The Impact of HDI on PCB Power Distribution

Craig Armenti, Mentor | 12-27-2017

High-density interconnect (HDI) technology is often used to meet the requirements of today’s complex designs. Smaller component pitches, larger ASICs and FPGAs with more I/O, and higher frequencies with shrinking rise-times all require smaller PCB features, driving the need for HDI. Beyond some of the more obvious electrical effects of the microvias used on HDI designs, there is also an impact to the power integrity the PCB. This includes different effects of mounted inductances of decoupling capacitors, changes in plane performance due to reduction in perforation from chip pinouts, and the inherent plane-capacitance changes from using dielectrics of various thicknesses.

HDI Primer

HDI can be a confusing topic, especially for new engineers and designers, or those not well versed in the subject matter. Although this article is not intended to be an in-depth tutorial on HDI technology, a quick review of the key aspects is appropriate.

HDI is a technology that, through a combination of high density attributes, allows for a higher wiring density per unit area as compared to traditional PCB technology. In general, HDI PCBs contain one or more of the following: reduced trace width and spacing, microvias including blind and buried, and sequential lamination.

Current generation HDI designs are typically found in mobile phones, digital cameras, laptops and wearables to name just a few. Basically, whenever a product needs to be compact and/or lightweight, then HDI technology will most likely be applied. The benefits of HDI technology include:

When utilizing HDI technology, two basic HDI structures exist:

  1. Build-up or sequential build-up (SBU) structures
  2. Any-layer structures

A key aspect of HDI technology is the use of microvias. For reference, the IPC HDI Design Committee has identified microvias as any hole equal to or less than 150 microns. Multiple types of HDI stack-ups associated with blind and buried microvias can be used to meet the density and cost requirements for today’s products. Design teams should develop stack-ups in conjunction with the board fabricator to minimize cost and meet signal integrity requirements. There may also be additional requirements related to plating and specific materials. As a rule, the vendor will adjust all the stack-up variables as needed during their process to meet the end-product requirements.

To read this entire article, which appeared in the November 2017 issue of The PCB Design Magazine, click here.