Editor's Note: Click here to read Part 1.
Micro-machining is used every day in circuit board manufacturing with both drill and routing bits. Micro-machining is a very broad term for techniques used to shape an object. I introduce this term because micro-machining, in combination with the fabrication and processing of objects in 2.5D and 3D is not commonly used in circuit board manufacturing. But vertical conductive structure (VeCS) technology will change that.
Today, the industry has available to it the infrastructure needed to shape circuits in a different way and to create new functions and applications, such as higher density connections between internal and external layers and tuned connections that minimize signal distortion. VeCS is a multi-depth slot element currently achieved with CNC machines (part of today’s infrastructure) using drill and router bits to create the shapes (Figure 1). The objective is to create a new structure that makes the vertical connections using the board real estate differently so that we do not comprise isolation.
CAF/electron migration are the primary constraints in reducing the distance between vertical connections (via hole, microvia, etc.). By using micro-machining, we can create structures that are less–or not at all–sensitive to these isolation defects. VeCS-1, as described in the first article of this series, is a slot going through the circuit from top to bottom. In this article, I will focus on VeCS-2 technology (blind slots) as more micro-machining techniques are required for VeCS-2 than VeCS-1.
Note that the examples in this article all focus on slots with the same depth. In a later article on VeCS, we will see multi-depth slots connecting signals, not only connecting the signal from the outside layers to the internal layer but from, for example, layer 3 to layer 10 creating an internal layer transition. Also, in future articles, we will address transparent layer transitions where more micro-machining techniques will come into play to define the different depths as well as the sequence of processing. It would be preferred to have machine codes defined that determined the depths and sequence of the processing. CAM systems need to accommodate the rules and process sequences to minimise the potential for error in engineering and fabrication.
Figure 1: The basic VeCS element shown from the bottom side using two traces and a power connection at the far end of the slot. Terms for the wide structures are cross route and bottom route.
The VeCS slot shown in Figure 2 is close to a 2.7 mm depth in a 3.0 mm product. The plating is split at the bottom of the deep slot creating two potentials. This particular slot is part of a test coupon, and therefore, has a connection on every layer. This would not be representative of a typical design.
Figure 2: Basic high aspect ratio VeCS-2 element.
If we use the VeCS for an internal layer transition (no connection at the top layer) we micro-machine the vertical trace away in the same process step as we do the cross route. Building on part one of this series where I introduced the VeCS slot, I will introduce some additional features under the topic of micromachining.
Electronics design applications constantly need more power and current, which opposes the need to make the features smaller, increasing resistance. These opposing constraints still apply to VeCS. With Power-VeCS, the vertical copper trace is shaped so that the cross section is larger, giving it a lower conductivity. Figure 3 shows the use of a half round cylinder extending from the side wall of the slot on the top layers (adding this construct on every layer compromises the routing channel).
We create the lower resistance connection by a combination of the vertical trace shapes with a stackup where Layer 2 (green) and Layer 3 (red) are a power/ground layer. In this manner, we create a lower resistance connection while keeping the connection to all ground and power in the same position. This prevents the shifting of ground and power. And at the same time, we keep the CAF bridge in place.
One difference between using micro-machining and the traditional PCB data sets can be the number of lines of machine-code/G-code required. For some designs, the amount of programming code can easily exceed the memory capacity of the current generation CNC machines. To reduce the number of lines of CNC code required, one could always write a specific machine code that defines a slot using a sequence of numbers for slot length and depth. Naturally, this makes the process more complex in that data files need to be cut up with correspondingly increased potential for error.
Depth control is one of the challenges in setting up the VeCS-2 slots process. Dielectric tolerances are a critical parameter when setting the depth. Dielectric measurement across the panel needs to be performed to set the correct depth. The layer below the slot needs to have isolation thick enough to accommodate the tolerance of the Z-axis on the CNC machine. This tolerance needs to be in the region of ±0.02 mm. It should be noted also that the type of pressure foot as well as resetting the Z-axis counter through contact with the surface are important in achieving good depth tolerances. Later in this series, I will introduce layer detection. This technique prevents what would otherwise be a complex, time-consuming, and somewhat inaccurate depth-setting process. Similar techniques will also be used for back drilling and depth-control drilling.
To read the full article, which appeared in the June 2019 issue of PCB007 Magazine, click here.