The photolithography process defines the circuitry on the panel. As one may surmise, the imaging process used in the fabrication of high-density and ultra high-density circuitry has made significant advances over the last decade—and just in time, as customers demand finer lines and spaces, as well as more attention to fabricating advanced packaging substrates. However, as is so true of many of the processes in PWB fabrication, upstream and downstream processes can and will influence what happens in a particular process. As an example, one can encounter voids in the via. It would be easy to assign root cause to the electroless copper process. Yet, a void in the via can originate due to debris left in the via, smooth resin surface due to less than optimum desmear, or aggressive micro-etching in the electrolytic copper plating as well. One can see that surface preparation plays a role in the adhesion of the photoresist to the copper surface.
Also, fabricators are asked to use lower-profile copper for signal integrity. These impact adhesion of the resist. To ensure that the image of the circuitry conforms as close to the desired design as possible (i.e., lines and spaces), surface preparation of the copper foil surface is one of the most critical success factors. Employing the optimum mix of surface cleaners, microetchants, and surface topography modifiers will provide a clean virgin surface free of soils, conversion coatings, and organics, as well as impart a microroughened surface to further enhance the adhesion of the resist.
The Surface of Copper
As previously discussed, as clean as the incoming copper-clad laminate and copper foil appear, there is more work to be done prior to resist lamination. A closer look at the copper surface will find several things that need attention:
- Chromate conversion coating
- Release agents
It goes without saying that surface preparation is the cornerstone of the imaging process. (This is not to shortchange the importance of the photolithography process.) However, the optimum surface prior to photoresist lamination provides several critical attributes:
- Increases process latitude for the resist
- Provides a stain-free surface
- Removes organic surface contamination as well as the chromate conversion coating
The overarching goal of surface preparation is two-fold:
- Produce a surface free of soils, fingerprints, etc.
- Provide a microroughened surface topography to enhance the adhesion of the resist
In general, surface preparation is done to assure good adhesion of metal, dielectric, photoresist, or solder mask to the prepared surface, although avoiding excessive adhesion could also be the object. Take the example of surface preparation before dry film photoresist lamination and potential failure modes (Figure 1):
- Failure to achieve good adhesion in a print-and-etch process will cause etchant attack under the resist and ultimately an “open” defect
- Failure to achieve good adhesion in a plating process will cause tin/lead or tin underplating, ultimately leading to “shorting” defects (“shorts”)
- Failure to achieve good release of unexposed resist during development can cause etch retardation in a print-and-etch process, ultimately leading to shorts
- Failure to achieve good release of unexposed resist during development in a plating process can cause poor adhesion of the plated copper—causing peelers
- Failure to achieve good release of the exposed resist during the print-and-etch process of inner layers can inhibit the uniform formation of the subsequent oxide or oxide alternative bond enhancement coating
- Failure to achieve good release of exposed resist in the plating process can reduce the effectiveness of the final etchant—leading to excess copper
The Importance of Uniform Surface Topography
Why should we be concerned about a non-uniform topography? Quite simply, today’s dry film resist technology relies on a clean and adequately roughened surface to promote the adhesion and the conformation of the resist. There is less reliance today on the chemistry of the resist for adhesion. Topography matters. However, a non-uniform roughened surface can present its own set of issues for the adhesion of the film. The actual profile of the copper surface may be due to excessive mechanical brush pressures, defective brushes, lack of pumice effectiveness, and over- or under-aggressive chemical treatments. This invariably leads to areas on the copper surface where there may be deep gouges and depressions as well as areas where the roughening is inadequate (Figure 2).
Figure 2: Excessive roughness in copper surface preventing dry film adhesion
When the copper surface is non-uniform with areas of deep crevices, as well as areas where little topography is seen, dry film resist adhesion in compromised. Depending on the particular unit operation in the fabrication process, this can lead to dish-downs, nicks in the copper circuitry, signal integrity loss, poor impedance matching, and non-unform dielectric thickness within the bondline.
In a future column, I will take a deeper dive into the various surface preparation methods.
This column originally appeared in the October 2022 issue of PCB007 Magazine.