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Steve Hageman has been designing electronics since elementary school. An engineer by trade, he has decades of experience performing PCB design and layout. He spent years at HP, Agilent and Calex before hanging out a shingle for his engineering company, Analog Home. As someone who wears engineer and designer hats, Steve was a natural for this month’s issue. I asked Steve to give us his opinion about the divide between some PCB designers and their engineers, and what can be done to solve this problem.
Andy Shaughnessy: Steve, tell us a little bit about your company and how you operate.
Steve Hageman: I have experience working for companies of 50 people, to working for a company with 10,000 employees, to working as an individual contributor solving my specific customers’ problems. As most engineers will agree, solving specific customers’ problems is perhaps the most rewarding.
Shaughnessy: A recent survey of our PCB designer readers found that there’s often friction between PCB designers and engineers. Some designers say their EEs are their biggest challenge. Why do you think there’s such disconnect?
Hageman: I remember a quote by David Packard: “Follow the advice that Abraham Lincoln gave himself: ‘If I don’t like this man, I have to get to known him better.’” I have found that to be very true. Mr. Packard also knew that to get along with others you had to understand what they face as challenges. Taking the time to see the other person’s point of view is very hard today with the crush of schedules that we all have.
I think the biggest disconnect is the schedule compression that happens. We all know how this goes: The design takes longer than expected, so the PCB start date is pushed out, but the PCB delivery date is not changed, hence the poor guy that is last on the schedule has his schedule compressed beyond belief. By then, everything is rushed and things fall through the cracks. And what falls through the cracks typically is the EE design constraints.
The PCB folks are also pushed by manufacturing and these manufacturing rules are oftentimes only vaguely known by the EEs, hence they don't know what to allow for.
At very large companies there is a third entity pushing the PCB layout: the EMC/safety folks. Again, more constraints and rules that the EE may only vaguely know about. All of this comes together with schedule compression and causes the PCB folks to have to redo portions of the design to meet all the known and unknown design constraints.
Redoing work is never fun for anyone, especially when the time demands are so great. The only solution that I know of is to learn from the uncovered serious problems and with the team decide a path forward to try to prevent these from happening again in the future. And then try to stick to the plan.
To read this entire article, which appeared in the April 2016 issue of The PCB Design Magazine, click here.
