Department of Defense Awards $30 Million to Expand Domestic Printed Circuit Board and Substrate Production
The Department of Defense announced today a $30 million award to TTM Technologies Inc. (TTM) in Santa Ana, California. This award, facilitated...
EMA Webinar: Maximize Your Design Productivity in OrCAD X and Allegro X
Learn how the extensible environment in Cadence OrCAD X and Allegro X is being used to enhance and customize the PCB design flow in a webinar held by...
ASC Sunstone Circuits to Present Lunch and Learn and Exhibit at PCB West 2024
ASC Sunstone Circuits will be exhibiting at PCB West 2024 Conference and Exhibition to be held from October 8th through the 11th at the Santa Clara...
Routing, Final Fab, and QC: Don’t Miss the Final Episode of On the Line With… Designing for Reality
Don't miss the final episode of "On the Line With… Designing for Reality," in which ASC Sunstone General Manager Matt Stevenson wraps up his deep...
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I-Connect007 Editor’s Choice: Five Must-Reads for the Week
October 4, 2024 | Marcy LaRont, PCB007 Magazine
Fall presents us with a lot of tradeshow activity, such as the Anaheim Electronics & Manufacturing Show, which kicked off the month in California. Our intrepid managing editor Andy Shaughnessy has been on the scene and I look forward to hearing more about the show from him. Next week, we’ll be at PCB West in the Bay Area, followed by SMTAI in Chicago the following week. For me, it feels like a proper launch into standard Q4 craziness highlighted by the end-of-year sales hustle and frenetic finalization of 2025 budgets. October also brings a stark reminder that the holiday season will soon be upon us. So, let the crazy begin.
Designer's Notebook: Heterogeneous Integration and High-density SiP Technologies
October 3, 2024 | Vern Solberg, Designer's Notebook
Often, our primary goal is to maximize product functionality without increasing product size. Developing a multifunction silicon-based semiconductor (system-on-chip) for a specific product application, however, requires a significant investment in both engineering and financial resources. The problem is that many of the newer generations of semiconductor die have actually increased in size, with higher I/O and terminal pitch variations that have become significantly smaller.
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Dana on Data: Resurrecting IPC Class 1
October 1, 2024 | Dana Korf, Dana on Data
IPC specifications and guidelines have been the standard performance, quality, acceptance, and design basis for PCB designs for approximately two generations. They have proven to be conservative enough that PCBs far exceed their...
Connect the Dots: Designing for Reality—Outer Layer Imaging
September 26, 2024 | Matt Stevenson, Connect the Dots
Welcome to the next step in the manufacturing process—the one that gets the chemical engineer in all of us excited. I am referring to outer layer imaging, or how we convert digital designs to physical products. On a recent episode...
Elementary, Mr. Watson: The Paradigm Shift of Silicon-to-System Design
September 18, 2024 | John Watson, Elementary, Mr. Watson
Imagine you were asked to build a city. What approach would you take? In the old way, city planners designed each building independently. They focused on making each building strong, aesthetically pleasing, and valuable. But they...
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