-
- News
- Books
Featured Books
- pcb007 Magazine
Latest Issues
Current IssueThe Growing Industry
In this issue of PCB007 Magazine, we talk with leading economic experts, advocacy specialists in Washington, D.C., and PCB company leadership to get a well-rounded picture of what’s happening in the industry today. Don’t miss it.
The Sustainability Issue
Sustainability is one of the most widely used terms in business today, especially for electronics and manufacturing but what does it mean to you? We explore the environmental, business, and economic impacts.
The Fabricator’s Guide to IPC APEX EXPO
This issue previews many of the important events taking place at this year's show and highlights some changes and opportunities. So, buckle up. We are counting down to IPC APEX EXPO 2024.
- Articles
- Columns
Search Console
- Links
- Events
||| MENU - pcb007 Magazine
Happy’s Essential Skills: Design of Experiments
March 17, 2016 | Happy HoldenEstimated reading time: 9 minutes
I guess I was lucky to be exposed to engineering statistics early in my college education. I never took a statistics course from the math department; if I had I might have thought it to be boring. Instead, it came as part of the chemical engineering basics. Since there is no “higher math” in most statistics, it is a good introductory course for engineers and essential to analyze lab and experimental results that will be part of the science and engineering education. My first design of experiment was done by long-hand; then, we did it by punched cards, and finally, with our slide rules (guess that dates me!). It wasn’t until the HP PCB problem solving that I wrote a basic program to conduct my DOEs on an HP 2116 computer.
Critical to DOE was the type of variables. In production, qualitative factors can be more significant than quantitative factors. Important quantitative factors (variables) are usually controlled, but qualitative variables can change without notice. Qualitative factors include: time of the year, day of the week, production shifts, production line, individual workers or machines, supplier sources, maintenance frequency, and even source of water. If you remember in my second column, and Figure 6 contained therein, for DOE with “factors not all being quantitative,” “screening experiments” are called for, such as described by Plackett-Berman[1] and in Fractional Factorial[2] (center boxes in Figure 1). Other application areas are comparative, modeling and optimizing.
Screening experiments (also called fractional factorial) are test plan used for an initial scan of problems having a large number—usually six or more—of presumed independent variables. The purpose of such plans is to determine which variables have the largest effects on the dependent variables. Results show only main or first-order effects (interactions), only the sensitivity of Y to a significant change in X1, X2 or X3, etc. Generally, interaction and second-order effects are not detected in screening plans.
Once the independent variables have been reduced to four or less, full factorial experiments can be conducted to understand all interactions and if the responses are non-linear and linear equations can be developed. Further experimentation can be conducted as ‘evolutionary operations’ to discover optimum settings and performances.
In the HP PCB problems, indeed the causes of the problems were an interaction of Monday vs. Friday, Day Shift vs. Graveyard Shift, process tank #1 vs. #4, and chemical supplier source. It was the qualitative variables that were at the Root Cause! A “one-at-a-time” experimentation couldn’t duplicate the root cause.
Some Examples
The next three figures show four different PCB process DOE results. The first, in Figure 2, is an experiment to minimize shifting of innerlayers during multilayer lamination. The variable and levels were a full factorial design of three variables at two levels:
1. Vented panel borders: with venting and without venting
2. Tooling methods for layup: ¼-inch holes and four 1/8-inch slots-centerline
3. Lamination pressure: 294 PSI & 344 PSI
The results are the image shift in microns. The lowest shift was 76 μm using vented borders, ¼-inch peripheral holes and the higher pressure. Analysis shows that the tooling method has the most positive effect on shifting and interacts with panel venting (V).
Figure 2: An example of factorial design of experiments (DOE) in printed circuit manufacturing to minimize innerlayer shifting during lamination.
The second experiment, in Figure 3, uses optimizing photoresist exposure, developing and etching to provide the highest production yield. The variable and levels were a full factorial design of three variables at three levels (center point):
1. Exposure energy in mjoules: 70, 50 & 30
2. Developer speed in inches per minute: 45, 40 & 35
3. Etcher speed in inches per minute: 45, 40 & 35.
The variables were chosen with the center point being the current production process: 50 mjoules, 40 in/min developer and 40 in/min etcher. The highest yield was 95% using slower developer speed, lower exposure intensity, and the slower etcher. Analysis shows that the developer speed has the greatest effect on yield and interacts with etcher speed.
Figure 3: An example of factorial design of experiments (DOE) in printed circuit manufacturing to optimize yield in exposure, developing and etch.
The third experiment, in Figure 4, serves to find the highest hole quality in a multilayer board. The variables and levels were a full factorial design of four variables at three levels:
1. Drill methods: (-) resharpened 4-8 times (0) resharpened
2. Drill diameter: (-) 0.008” (0) .014” (+) 0.020”
3. Infeed rate: (-) xx in. per min. (0) xx in. per min (+) xx in. per min
4. Construction: (-)Std. Foil-Lam (0) Thick-prepreg w/foil-Lam (+) Std. Core-Lam.
The results are the hole quality (rms roughness %) and max. innerlayer mushrooming in microns.
The best quality was 0 microns mushrooming and
The fourth experiment, shown in Figure 4, is to further find the highest hole quality and to look at drilling productivity. The variables and levels were a fractional factorial design of three variables at two levels:
1. Drill method: (-) new drills (+) resharpened 6 times
2. Stack height: (-) 1 high (+) 3 high
3. Panel venting dams: (-) no-flow dams (+) full venting dams
The results are the hole quality (rms roughness %) and max. innerlayer mushrooming in microns.
The best quality was < 4% rms hole-wall roughness using a plane of new drill bits for stacks of 1-high with any appropriate venting dams. Analysis shows that the old resharpened drills could be used with drill stacks 3-high and has a usable hole-wall roughness but it interacts with drill infeed rates.
Figure 4: Two more examples of DOE for hole quality in multilayer boards. Full factorial design on the left was conducted to optimize drilled hole quality. Fractional factorial DOE on the right further optimizes hole quality and production productivity.
Notice that this last experiment was a fractional factorial. The power of a scanning experiment using the fractional factorial methodology is that N number of variables can be reviewed with only N+2 experiments. This is useful to find main effects, but not interaction, while later experiments will provide examination of interactions and optimization.
Page 2 of 3
Suggested Items
Real Time with… IPC APEX EXPO 2024: Ventec Discusses New Pro-bond Family of Advanced Products
05/01/2024 | Real Time with...IPC APEX EXPOChris Hanson, Ventec's Global Head of IMS Technology, outlines the launch of four pro-bond formulas that deliver an outstanding combination of low dissipation factor (Df) with a dielectric constant (Dk) range to maximize the design window for critical PCB parameters. As Chris points out, Pro-bond is designed for low-loss, high-speed applications, while thermal-bond dissipates heat from a component through the board to a heat sink.
IPC's Vision for Empowering PCB Design Engineers
04/30/2024 | Robert Erickson, IPCAs architects of innovation, printed circuit board designers are tasked with translating increasingly complex concepts into tangible designs that power our modern world. IPC provides the necessary community, standards framework, and education to prepare these pioneers as they explore the boundaries of what’s possible, equipping engineers with the knowledge, skills, and resources required to thrive in an increasingly dynamic field.
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.
Cadence, TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
04/25/2024 | Cadence Design SystemsCadence Design Systems, Inc. and TSMC have extended their longstanding collaboration by announcing a broad range of innovative technology advancements to accelerate design, including developments ranging from 3D-IC and advanced process nodes to design IP and photonics.
Ansys, TSMC Enable a Multiphysics Platform for Optics and Photonics, Addressing Needs of AI, HPC Silicon Systems
04/25/2024 | PRNewswireAnsys announced a collaboration with TSMC on multiphysics software for TSMC's Compact Universal Photonic Engines (COUPE). COUPE is a cutting-edge Silicon Photonics (SiPh) integration system and Co-Packaged Optics platform that mitigates coupling loss while significantly accelerating chip-to-chip and machine-to-machine communication.