Compound Photonics Selects Velocity CAE Design-to-Test Tools From Alliance ATE
November 6, 2019 | GlobeNewswireEstimated reading time: 1 minute
Alliance ATE Consulting Group, Inc. announces today that Compound Photonics U.S. Corporation, a global leader and innovator of high-performance microdisplay solutions for wearable and automotive applications, has selected the Velocity CAE Design-to-Test software for their vector translation requirements. The Velocity CAE software provides semiconductor manufacturers with industry leading automation and processing, enabling translation of WGL, STIL and EVCD simulations to Automatic Test Equipment (ATE) platforms. Velocity CAE also generates Verilog files encoded with the ATE Manufacturer’s information to be simulated producing Guaranteed-by-Design manufacturing test files. This process ensures first-pass success, eliminating the resource draining requirement of design engineers having to re-engineer new Verilog test benches months later in the release process, delaying Time-to-Market.
"Alliance ATE's Velocity CAE tools provide Compound Photonics with a comprehensive and easy to use toolset that enables our engineers to be extremely productive in a very short period of time," said Ian Kyles, Vice President of Engineering. "The Velocity tools simplify test vector conversion and design validation by generating high quality ATE files and Verilog test benches; it’s an extremely efficient solution for our Design-to-Test requirements.
“Alliance ATE's customers are able to evaluate and integrate Velocity CAE very quickly into their Design-to-Test process. We’re seeing significant demand for the Velocity CAE tools in the marketplace,” said Bill Wymbs, CEO of Alliance ATE. "Velocity CAE provides customers with the industry's easiest to use and most efficient Design-to-Test tools that produce Guaranteed-by-Design manufacturing files through the “REPLAY” process. Anyone that has had their lead designers stop and go back to debug Verilog test benches will want to use Velocity REPLAY. The real Time-to-Market bottleneck is generating Verilog test benches that are guaranteed to work in manufacturing the first time.”
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