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The advantage of parallel design architecture is that it lets multiple designers work on the same design simultaneously without needing to partition the design.
By Charles Pfeil
Since the broad adoption of computer-aided circuit board design in the early 1980s, there has been a strong push to increase design productivity through automation and process optimization. Unfortunately, with advancements in circuit design software, there has been a corresponding demand to support new signal, component or board fabrication technology - resulting in a net gain of zero (or worse) for overall design time. Over the last 20 years, software vendors have spent their development resources enhancing or re-engineering placement, routing, analysis and manufacturing software to keep pace with circuit, packaging and manufacturing advancements.
Without a significant paradigm change in design methodology, software continues to play catch-up with hardware technology. Concurrent engineering has been the torchbearer of productivity by applying multiple engineers to the same design. This method relies on splitting the design into several pieces, passing them out to multiple people and joining the pieces together to resolve conflicts either through brute force - automatically making the decisions based on pre-defined rules, or with finesse - asking the engineers to resolve conflicts one by one.
This method has been somewhat effective with circuit design schematics because it partitions the design into blocks and sheets based on a function. There is, however, considerable manual effort to resolve interconnections between blocks. A parallel design methodology only can approach ultimate flexibility and productivity if it allows multiple designers to work simultaneously on the same design, seeing each others’ edits as they occur and having all potential conflicts managed automatically in real-time.
The Parallel Design Architecture
The advantage of parallel design architecture is that it lets multiple designers work on the same design simultaneously without needing to partition the design. This makes it a true real-time collaboration environment, eliminating the problems associated with partition boundaries and managing the data integrity during split-and-join operations. This can be done simultaneously, reducing the total time to complete the design.
Parallel design technology requires a design session manager (server) and multiple design clients in a networked environment. The server software receives update requests from each client, checks the request to ensure no design rule violations were made and then synchronizes each client with updates. Each client must have its own dedicated processor and memory to view the entire design and witness edits from other clients as the server processes them (Figure 1).
Figure 1: A parallel design client-server network.
Starting a Design
Each design has an associated design team and the members of the team are given access permission to the design data. Any member can start a design session on the server, or on a single client, and additional clients can join the session at any time. This flexibility enhances the ability to manage designer resources.
When the design is first loaded on the server, each client is initialized and synchronized by the automatic downloading of the current state of the server design into the client memory space. Once a client has joined the design session, edits on the design can be made using the standard editing tools. When a client joins a design session, a “handle” is defined and can be attached to the cursor and displayed to identify the designer.
An edit event is a discrete action that is captured and sent to the server as an update request. For example, moving a part from point A to point B constitutes an edit event (Figure 2). Thus, the following occurs:
- A design rule check (DRC) is performed on the client.
- The edit event is sent to the server as a transaction.
- The request goes into an Input Message Queue, with priority based on the FIFO (first-in-first-out) method.
- The server takes the edit request, integrates it into the design database, performs a DRC and, if no violations are found, the edit is approved and sent through an Output Message Queue to the clients for synchronization of the client in-core databases.
- The client that made the original request does not have the edit event completed until the server broadcasts the update to all clients.
Figure 2: Processing edit events.
There are many conflicts that could occur when multiple designers are working on the same design. The effectiveness of this technology depends on its ability to resolve or prevent conflicts between designers or automatic processes. What if two designers want to move the same part? What if you clear out an area to route a set of signals, but another designer puts a component in the cleared space? Providing optional methods to avoid conflicts is one solution to a problem that may vary in significance depending on individual designer dispositions. Some potential conflicts are:
- Timing Collisions - To prevent multiple clients from editing the same object at the same time, the object is reserved for the first client selecting it.
- Permanent Protection - A client may lock objects, preventing other clients from editing them while they are locked.
- Temporary Protection - A client may draw a complex polygon as a reserved area. Once drawn, only designers assigned to that reserved area can edit objects inside it.
- Sandboxes - As a further extension of reserved areas, clients may define an area by a layer that is reserved for “what if?” design work. The client may work in the sandbox and provide updates to the server manually instead of automatically.
- Constraints - In addition to rule areas, an in-process design data management system is required to allow each designer to change constraints and apply them either locally or across the entire design. Versioning and notification/approval of constraint changes in a hierarchical system are essential.
- Communications - Multiple designers can communicate with gaming headsets using Internet-based communications software.
- Force Fields - A force field is an optional method to prevent the cursors of multiple clients from overlapping and interfering with each other.
The circle around the cursor of IanG is larger than the one around DeanW (Figure 3). The circles represent a force field. As a designer spends more time actively working in an area, the force field gets larger (up to a pre-defined limit). If a designer moves to a new area, the force field is small and starts to grow as activity in that area increases. IanG has a larger force field because he has spent more time editing in that area. DeanW’s force field is smaller because he is a relative newcomer to the area. DeanW cannot click inside IanG’s force field, and visa versa. To what types of processes will this parallel design architecture be applied?
Figure 3: Using force fields.
The parallel design architecture described forms the basis for parallel layout, enabling multiple designers to work on the same design using the same application and seeing the edit events from all clients in real-time. The primary task is to develop the infrastructure for communicating changes and synchronizing all participants in the design session while maintaining data integrity.
The second application of parallel design technology targets circuit board autorouting. Distributed autorouting has been considered the “Holy Grail” of circuit board routing software. IC routers have been converted to work in a distributed environment. However, the routing problem for circuit boards is quite different. Until now, the belief was that the autorouter would have to be re-written to take advantage of multiple computers working on the same design.
Parallel design technology has an infrastructure that provides a solution to a problem in distributed routing - how to prevent or resolve conflicts. Again, the server performs a design session management role in which updates from each autorouter client are integrated, checked and broadcasted to the other clients. All of the autorouter clients are synchronized so that when additional route paths are added locally, the opportunity for conflicting route paths is reduced.
Parallel Autorouting Performance
Parallel autorouting requires additional data and process management beyond that of parallel layout where the slowest element in the system is the designer. What kind of performance gain can we expect from such an environment? Initial tests show that for large and difficult boards, there is a 0.75 performance ratio to the number of routing clients. Results may vary depending on the design, but a ration above 0.50 is considered worthwhile.
Combining the technology needed for parallel layout and integration creates an environment in which different design flow applications can be integrated and used by multiple designers simultaneously. Therefore, in a cell phone design, the movement of a part in layout can be immediately updated and checked in the 3-D mechanical system.
Parallel design technology offers many opportunities to reduce design time and increase quality. It is the next paradigm change beyond concurrent engineering, and opens the door to more advanced methodologies throughout the design process. The core technology enables multiple entities, tied through a local or global network, to work on the same design at the same time.