Global Electronics Association's ADEPT Council Deepens Taiwan Presence as First Satellite Council Holds Inaugural In-Person Meeting
The Global Electronics Association's Advanced Electronic Packaging Technology (ADEPT) Leadership Council is deepening its presence in...
Global Electronics Association Hosts IMPACT 2026 Session on Advanced Electronic Packaging System Integration, with Technical Perspectives from Unimicron, STATS ChipPAC and Wistron
The Global Electronics Association hosted the session "Advancements in Component to System Integration" at IMPACT 2026, bringing together Unimicron,...
Qnity Advances Interconnect Innovations for Next-Generation Smart Consumer Electronics
Qnity Electronics, Inc. introduces ultra-thin flex circuit materials that help enable the next generation of smart consumer electronics, including...
Samsung Electro-Mechanics Signs KRW 360.5 Billion Package Substrate Supply Deal
Samsung Electro-Mechanics has signed a long-term supply agreement (LTA) worth KRW 360.5 billion for 'Memory Semiconductor Package Substrates' with a...
Amkor Technology, NVIDIA Expand AI Infrastructure Partnership
Amkor Technology, Inc., a leading provider of outsourced semiconductor packaging and test services, announced additional investments in South Korea...
NVIDIA, Supply Chain Partners Expand Capacity to Accelerate AI Infrastructure Buildout
NVIDIA announced plans with a group of supply chain partners to expand global manufacturing capacity to meet growing demand for its accelerated...
Knocking Down the Bone Pile: Interposer Rework and Precision Solder Ball Attachment
October 28, 2026 | Nash Bell, Knocking Down the Bone Pile
An interposer is a thin substrate positioned between a semiconductor device, such as a BGA and PCBA, containing conductive features that allow electrical connections to be rerouted, recreated, or modified between the component and the PCB. Interposers may be manufactured from organic materials such as polyimide or FR-4, as well as silicon, glass, or other specialized materials. In PCB rework, they are most commonly used when the existing board design cannot easily be modified through conventional rework techniques.
3 Key Takeaways: Understanding the Promise and Practical Limits of ELIC
October 26, 2026 | I-Connect007
As semiconductor packages become smaller and more complex, PCB designers face increasing pressure to accommodate higher interconnect densities within tighter space constraints. Every layer interconnect (ELIC) technology offers a way to overcome some of the limitations of traditional HDI construction, but achieving greater density introduces new challenges in fabrication, reliability, and cost. In his white paper, ELIC: Every Layer Interconnect—The Promise, the Pain, and the Practical Limits, ASC President and CEO Anaya Vardya examines the advantages of ELIC architecture, the manufacturing challenges that accompany it, and the design decisions that determine whether a board can be produced reliably at scale.
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Hyundai Mobis Advances Korea’s Automotive Semiconductor Collaboration
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MKS’ Atotech Showcases Advanced PCB Solutions at CPCA Show Plus 2026
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SMTA Renames Event as Microelectronics Packaging & Integration Symposium
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