Enhancing Thermal Performance of CSP Integrated Circuits


Reading time ( words)

In the portable electronics market, power management integrated circuits (PMICs) are increasingly found being packaged into ball grid array (BGA) and chip scale packages (CSP) for their lower material costs, improved electrical performance (no bond wire impedances), and smaller form factors. These advantages do not come without compromise: The silicon die of CSPs are no longer in direct contact with large heat-spreading thermal paddles (E-PADs) used for electrical and thermal conduction.

This is the primary performance trade-off; because the IC substrate is not in contact with an E-PAD there is no high-conductivity direct thermal connection from the substrate to the heat-spreading copper planes on the PCB. This article will discuss PCB level methods that will lower the operating temperature of CSP devices by examining methods to transfer heat from the source and transport it to the ambient environment by lowering thermal resistance of the CSP IC. There are usually multiple ways to enhance the performance while simultaneously lowering the operating temperature that can be incorporated into new boards or revisions of existing boards.

In order to meet size and weight requirements, constraints of portable electronic designs often force PCB designers to reduce the size of components and PCB real estate area. To meet these demands, the use of CSP packages to shrink the PCB area needed is a common change in designs. As a result of the reduction of total PCB area, the available options to move heat and route high-power PCB traces is also reduced. Furthermore, the thermal performance cannot be matched when a QFN is compared to an equivalent CSP package; therefore, it is imperative that the PCB is designed to optimize heat transfer from the CSP to the PCB, which in turn dissipates it into the atmosphere. The parameter measuring the heat conductivity is the junction-to-ambient thermal resistance specification, Theta-JA (ӨJA (˚C/W)).  

To read this entire article, which appeared in the January issue of The PCB Design Magazine, click here.

Share

Print


Suggested Items

Book Excerpt: Producing the Perfect Data Package

06/03/2020 | I-Connect007 Editorial Team
The following is an excerpt from Chapter 1 of Mark Thompson's I-Connect007 eBook "The Printed Circuit Designer’s Guide to... Producing the Perfect Data Package." Mark is in engineering support at Prototron Circuits and a Design007 columnist.

Mentor’s Cristian Filip Discusses His Award-winning DesignCon Paper

03/21/2019 | Andy Shaughnessy, Design007 Magazine
During DesignCon, I met with Cristian Filip, a senior product architect with Mentor, a Siemens business. Cristian had just received word that his paper had won a DesignCon Best Paper award—his second such award in three years. I asked Cristian to discuss his paper and how this technology can help improve manufacturing yields at high volumes.

Signal Integrity: The Experts Weigh In

11/14/2017 | The I-Connect007 Team
When we began planning the October issue on signal integrity, we arranged a conference call with a variety of industry experts. Mike Steinberger of SiSoft, Mark Thompson of Prototron Circuits, and Yogen and Sunny Patel of Candor Industries joined editors Andy Shaughnessy, Patty Goldman, Happy Holden and Publisher Barry Matties on the call for a spirited discussion about the challenges related to signal integrity and some of the tricks of the trade for helping ensure SI.



Copyright © 2020 I-Connect007. All rights reserved.