Reliability Testing and Failure Analysis: Lessons Learned


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Delegates came from as far afield as Finland, Lithuania, and France to rainy Woking, in Surrey, UK, to attend the first in a series of reliability testing and failure analysis workshops organised jointly by EIPC and IPC. Engineers from process suppliers, PCB fabricators, EMS providers, and OEMs were keen to build their knowledge and understanding, to learn about material selection, current electronics research and failure analysis case studies, to gain an insight into design considerations for advanced assembly processes and modern analytical techniques for materials characterisation, and to discuss and share their own practical experiences.

Workshop leader and presenter was Dr. Martin Anselm, manager of Universal Instruments' Advanced Research in Electronics Assembly (AREA) Consortium, which conducts research into materials, processes and reliability for over 30 member companies, all big names in the electronics assembly industry.

He commented that because electronics OEMs and CEMs were under pressure to adapt quickly to new market trends and technologies, the drive to meet these expectations often resulted in a less-than-thorough understanding of new components, materials and processes, and an inability to implement credible reliability testing and validation procedures. In his opinion, the term “reliability” was frequently misused, since many tests were evaluations based upon internal, customer-driven, or industry-accepted standards which did not always provide meaningful pass/fail criteria and as a result were often no more than best guesses for the reliability of products in the field.

Theme of the first workshop session was the cost of failure, with specific case studies and a review of testing methods. Dr. Anselm set the scene by listing the areas in an EMS environment where failure could originate: Process, component, PCB, stress, commenting that people were not generally interested in hearing the actual facts and were more inclined to pass the blame up the supply chain: “It’s the supplier’s fault!”

There were many opportunities to reduce cost in the product life cycle, to streamline materials selection, to achieve continuous process improvement, to enhance yields, to optimise product reliability, and to modernise testing procedures. Total life cycle costs were largely determined at the design stage, and traditionally OEMs had spent 75% of their development costs on test-fail-fix activities, so it paid to focus on the front end of the product life cycle to reduce cost and time during concept and development.

Reviewing tools and techniques for failure analysis, Dr. Anselm took the phenomenon of CAF--conductive anodic filamentation along glass fibres in PCB laminates--as his first case study. CAF could occur trace-to-trace, hole-to-trace, hole-to-hole or trace to hole and a CAF fault could be difficult to locate, particularly since it could act as fuse once it had grown to reach the cathodic conductor and hence show a cyclic intermittent short circuit. Electrical testing could indicate an approximate location, then skilful microsectioning and microscopy could reveal the actual CAF defect, which might be in a specific glass-fabric layer in a construction and be batch-related to glass surface treatment or incomplete resin penetration far back along the supply chain--in effect “the supplier’s supplier’s supplier.” But once the problem was isolated and identified, there was an opportunity to work towards eliminating it in the future, and to determine whether other products traceable to a particular batch might show the same problem. “You will never answer the question unless you get to this level of detail!”

Dr. Anselm’s second glass-related example was “wicking”--penetration of plating chemistries along glass yarns resulting from fracturing of the glass in the PCB drilling process. He showed many examples of plated-though-hole defects and invited delegates to suggest how they had originated. Were they a consequence of drilling parameters, tool condition, stack height, backing board? Or were they a consequence of particular features in the board design--were via holes pitched too close together? Did they relate to non-functional pads? There were plenty of questions to ask the PCB supplier.

Moving on, he discussed instrumental analysis techniques, how and where they could be employed, what sort of data could be collected and how this could be used to demonstrate the origin of defects and failures. A case example he used was a problem with high-temperature lead-indium solder investigated by differential scanning calorimetry, which showed unexpected extra melting and solidification points at lower-than-nominal temperatures. Further investigation showed the effect to be caused by tin contamination. There should have been no tin in the system but a component buyer, eager to save money, had purchased tin-finish capacitors instead of the specified gold-finish and unknowingly initiated a serious reliability problem.

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