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Suggested Items

Trouble in Your Tank: Pre-electroless Causes of Voids

09/02/2026 | Michael Carano -- Column: Trouble in Your Tank
To support advanced 2.5D and 3D heterogeneous integration, product and motherboard designs are now using higher layer counts. As layer counts increase, plated through-holes (PTHs) become deeper and higher in aspect ratio, making it more difficult to achieve a continuous, void-free copper deposit. Drilling these thicker panels and higher aspect ratio vias adds another layer of complexity. Since there are many potential causes of PTH voiding, I’ll focus on pre-electroless copper causes, including drilling.

Trouble in Your Tank: At 40 GHz, Everything Matters, Part 1

07/07/2026 | Michael Carano -- Column: Trouble in Your Tank
The electronics industry supply chain is moving very quickly with the explosion of AI servers, high-performance computing, ADAS, quantum computing, and 5G/6G. Signal integrity is under scrutiny in an entirely new role. With many factors influencing signal integrity, one area that contributes to signal distortion at high frequencies is the PCB’s final finish layer deposits. Frequencies above 40 GHz are susceptible to such distortions, and data transfer rates of 224 GB/s are driving changes in PCBs and IC substrates.

Innovative Flash Copper Plating Technology

05/21/2026 | Andreas Schatz and Mustafa Özkök, MKS’ Atotech
The continuous push toward higher functionality, miniaturization, and performance in modern electronic devices—such as smartphones, wearables, and advanced computing platforms—has intensified the demand for high-density interconnect (HDI) printed circuit boards. Central to HDI performance is the reliable formation of blind microvias (BMVs), which serve as critical interlayer connections in modified semi-additive processes (mSAP).

Advanced Packaging for AI: Reliability Starts at the Cu/Cu/Cu Microvia Junction

04/20/2026 | Kuldip Johal, MKS' Atotech
The rapid growth of AI computing, from training clusters to inference at scale, is reshaping demand across the entire electronics supply chain. Advances in technology requirements, such as higher bandwidth, lower latency, and greater compute density, are driving the development of advanced packaging technologies and transforming the PCB industry across design, manufacturing, testing, and even architecture.

Trouble in Your Tank: Understanding Interconnect Defects, Part 2

12/03/2025 | Michael Carano -- Column: Trouble in Your Tank
Part 1 of this two-part series presented a more detailed look at the underlying causes of interconnect defects (sometimes known as interplane separation), with these three modes of interplane separation: Type 1: Separation of the electroless copper deposit from the interconnect; Type 2: Separation of the electrolytic copper deposit from the electroless copper deposit, but the electroless remains on the post; Type 3: Cohesive failure of the electroless, whereby the electroless copper deposit actually separates from itself.
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