Institute of Circuit Technology Meriden Seminar, 2018
March 21, 2018 | Pete Starkey, I-Connect007Estimated reading time: 8 minutes
Andre Bodegom, managing director of Adeon Technologies, discussed new developments in automated optical inspection (AOI), with particular reference to traceability. Commenting that the technology gap between IC substrates and PCBs was progressively narrowing, he listed the challenges to the developers of today’s AOI systems: maintaining design-embedded intelligence and key feature information, automatically attaching specific inspection parameters, and handling the data processing associated with high-mix quick-turnaround work, whilst maximising equipment utilisation by combining applications, and communicating inspection, measurement and traceability information to the outside world.
With the aid of a series of examples and screen-shots, Bodegom explained the concept of “parameterised” optical inspection, beginning with the software capability to read the original CAD data from any source and apply smart logic to filtering and zoning the attributes, identifying different materials and technology levels per layer, predicting magnification levels and automatic adjustment of greyscale and illumination with respect to the variety of track-widths, pad types and features, and identifying types of defects and their impact, enabling a straightforward and user-friendly error-free set-up for the operator.
Industry-leading equipment was capable of automatically identifying the particular layer of a particular job by barcode or QR code, and could set up, calibrate and register on-the-fly, with full automation an option, and scan and report defects according to pre-set technology levels and defect sizes, with on-line or off-line verification. Add-on metrology options could enable accurate dimensional measurement as well as height measurement and 3D profiling.
All results from inspection and verification could be collated in a central database, integrated into the factory IT system with open-platform logic, and accessed via any web browser on the same network, with the facility to maintain complete traceability and to let the customer generate any defect classification report he might need.
Graham Naisbitt, managing director of Gen3 Systems Ltd, presented a new approach to the ionic contamination testing of electronic circuit boards and assemblies. He discussed the limitations of the traditional method measurement of ionisable surface contaminants by resistivity of solvent extract (ROSE), which had originated back in the 1970s and is documented in IPC-TM-650, method 2.3.25. Although the technique had originally been intended for use as a process tool, it had been widely adopted as an acceptance test for cleanliness, in military and commercial standards. The requirement was to achieve better than the ionic equivalent of 1.56 micrograms of sodium chloride per square centimetre of extracted surface.
Naisbitt commented that the 1.56 micrograms limit was arbitrary, and did not correlate with environmental field reliability, especially considering the wide range of complexity of assemblies, the variety of components, feature sizes, number of solder joints, flux types and materials. Moreover, the test did not detect non-ionic contaminants which might contribute to reliability issues, and the conditions of test could extract ionic species from deeper within the material than the surface, which in real-life would never appear as free ionic material or affect reliability but could be interpreted as false defects.
Of more recent times, these limitations had been acknowledged and there had been a desire to change the approach to contamination testing, with the aim to use the dissolvable ionic material as a process indicator. A joint exercise by Robert Bosch and Gen3 Systems had demonstrated the validity of the process monitoring approach, and the consistency of measurement had been validated statistically by a gauge repeatability and reproducibility analysis across a number of sites world-wide. Sufficient flow rate, CO2 compensation and sensitive conductivity measurement had been shown to be necessary to achieve consistent performance. This test was of short duration and run at room temperature and was known by the acronym PICT (process ionic contamination testing). Naisbitt described in detail the work that had been done to optimise the PICT test process, and to compare it with the equivalent ROSE procedure.
The IPC ROSE working group had produced a white paper recommending that the technique should no longer be considered a cleanliness method but rather as a process indicator, and this recommendation would be included in Revision H of IPC-J-STD 001, classing PICT as a process control method. Naisbitt was leading the UK team working on the development of IEC 61189-5-504, which would similarly address previous difficulties and shift the emphasis from cleanliness assessment to process indicator.
Professor Andy Cobley wrapped up the proceedings, thanking participants, and the evening concluded with the customary convivial networking session.
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