GOWIN Semiconductor Takes Leadership Position in Always-On Low Power FPGAs with GW1NZ-ZV Device Production

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GOWIN Semiconductor Corp., the world’s fastest-growing programmable logic company, releases full production of their GW1NZ-ZV FPGA, offering 50% lower static power consumption over competing flash-based FPGAs at under 28uW.

Low power FPGAs have had a distinct advantage over many microcontrollers for applications requiring always-on and always-monitoring of IO and peripherals in a system. The reason is that microcontrollers must always have their entire processor clocked in order to provide monitoring functions. While the processor speed can be changed to consume less power its active power consumption is often considerable. Alternatively, an FPGA’s dynamic power consumption is based on the number of logic elements used and the rate at which data is being transitioned and clocked. If an FPGA’s static power is low, FPGAs can be optimized to consume dynamic power only on the small subset of logic elements used for IO and interface monitoring while the other logic elements are gated from seeing any activity.

GOWIN’s Ultra-low power flash-based GW1NZ-ZV device is now in full production offering the lowest power consumption to date. With a 0.9V core voltage, it offers static power consumption at less than 28uW. As a result, the GW1NZ-ZV FPGA is over 2.4x lower in static power consumption when compared to competitive flash-based FPGA devices. The low sub-1V core voltage also promotes significantly lower dynamic power consumption and overall total power profile.

Mobile, Edge and IoT applications benefit tremendously from FPGAs in always-on applications due to their ability to continuously monitor data at very low power consumption while the rest of the system is placed in standby. Monitoring peripheral activity with an FPGA often only requires a small portion of the total logic elements. The FPGA can dynamically throttle additional FPGA resources or be used to wake up other components in a system behaving as a power management unit for the FPGA design itself as well as the product.