Just Ask Happy: The Exclusive Compilation
August 13, 2020 | Happy Holden, I-Connect007Estimated reading time: 11 minutes
Two-Layer Low-Speed PCBs
Q: Why do many two-layer boards work in low-speed applications, signal integrity-wise?
A: Two-layer boards, properly designed, will even work in high-speed applications! Even a single-sided board will. If the signal rise times are slow, signal integrity does not enter in the solution.
Resin-Filled Vias Without Voids
Q: What is the best way to resin-fill vias without voids?
A: I have not used this process a lot. In the past, partially filling surface vias with solder mask was sufficient. But now, with via-in-pad and stacked microvias, the filling process must be much more complete. Several machines on the market do this job very adequately and can be seen at the IPC APEX EXPO or SMTA International.
Integrating Design Processes With IEEE HIR
Q: How will the PCB design process change to align with the IEEE Heterogeneous Integration Roadmap (HIR), and do you think this will happen?
A: This is happening now! New EDA system tools are being created for the growing automotive complexity of autonomous vehicles. These tools can also be applied to other electronic systems, such as mobile phones, 5G networking, medical, space, high-performance computing, and IoT. In the past, we called these chip-on-board (COB), multi-chip modules (MCM), and system-in-packages (SIP).
The new name is heterogeneous integrated modules (HIM). Heterogeneous was chosen because the future modules will incorporate not just IC chips, but also power devices, passive discretes, photonics, MEMS, sensors, antennas, and batteries. Systems-on-chip (SoC) will continue to be an activity, but as Moore’s Law has flattened out, using multiple-cores processor chips w/memory is more cost-effective for greater computing power. As applications grow—and size, cost, and weight are more critical—HIM offers the best choice to move all of these elements closely together in a module.
A good summary paper on this topic was written by Paul Wesling at the SMTA 2020 Pan-Pacific Conference, “The Heterogeneous Integrated Roadmap: Enabling Technology For Systems of the Future,” available from SMTA in August. For more details, the 584-page HIR is available at pwesling.com/hir. Its 23 chapters cover the full gamut of topics related to integrated modules, from today to 2033, for all major electronics markets.
Mechanically Drilled Blind and Buried Vias
Q: Why are mechanical blind and buried vias popular in certain market sectors, yet they never took off in others?
A: Blind and buried vias have their advantages. If only a few are needed, then they can be mechanically drilled. But in markets where miniaturization is essential, and the volumes are high, the laser is the drilling machine of choice.
PCB Design For EE Undergrads?
Q: Do you think that PCB design should be added to an undergraduate EE curriculum?
A: I think it should be an elective that engineering students could take. It is an essential part of the electronics development process, and a PCB design course will work well with a signal and power integrity elective.
Stacked Microvia Reliability Issues
Q: Stacked microvias look good on paper, but they may have reliability problems. What are the best rules for designing stacked microvias to ensure a reliable PCB?
A: The current best practice is stacking no more than two layers, and then moving over for the next buried or blind via or stacking two layers there. The stacked vias should never be stacked on any buried vias.
An IPC committee is currently testing various stacked via configurations to have a comparison for reliability and testing coupons and design. Hopefully, they will also get at the root cause of why stacked microvias are failing at their interface.
Flexible Circuits and 5G
Q: Will flexible circuits be considered an integral interconnect for 5G technology?
A: Yes. Flex circuits will evolve to fulfill the needs of 5G. What may change are the “connections” as millimeter-wave devices, and IIoT can be used to connect signals in 3D and at angles instead of using flex.
Ground Reference Planes
Q: How important are GND reference planes in signals that are less than 50MHz, since 1/4 wavelength is about 30 inches?
A: GND is an essential part of the circuit. The return path for DC is the lowest resistance, but for the AC part of the signal, it is the lowest inductance.
The Future of Mechanical Blind, Buried Vias
Q: Do mechanical blind and buried vias have a future?
A: Yes, especially for the newly invented VeCS technology, which uses a mechanical drill to gain the same density as laser-drilled microvias, but with higher reliability. For more information, read this series on VeCS technology by Joan Tourné of NextGin Technology, which ran in PCB007 Magazine in 2019 (also read Part 2, Part 3, and Part 4).
Routing BGAs With High-Speed Differential Pairs
Q: What advice can you give for routing BGAs with high-speed diff pairs when the routing of these signals so often cuts off routing channels for other signals?
A: This can be a complex topic, as there are a lot of circumstances that require consideration. My advice is to download a great book written by Charles Pfeil when he was an engineering director at Mentor. “BGA Breakouts and Routing: Effective Design Methods for Very Large BGAs” can be downloaded from Mentor’s library, and print copies are available for purchase from Amazon. Charles covers all of the options and boundary conditions that can come up, and he discusses the topic in the details that it requires.
The Proper Order of Design Techniques to Improve Connectivity
Q: There are usually several ways to improve connectivity on any board (including HDI boards). But are there any general principles for which order these features should be added to achieve the best results?
A: From a connectivity and density improvement standpoint, the use of blind vias (either drilled or lasered) offers the greatest gain, especially since the pitch of active components that drives density is shrinking. Next is the reduction of the diameter of via holes and smaller annual rings. Reducing traces and spaces comes next if you do not run into impedance and signal losses, and then blind vias. The final step is adding more layers.
Flexible Circuit Reliability Concerns
Q: What are the key reliability concerns for flexible circuits moving to newer technologies, materials, and processes?
A: The reliability concerns for flex are the same as for rigid circuits, with the exception of flexing. Material performance, conductor performance, external factors, usage, cleanliness, assembly, etc., are all important. Raza Ghaffarian of the Jet Propulsion Laboratory wrote a great review of flex reliability in the 7th edition of “The Printed Circuit Handbook,” which I co-edited with Clyde F. Coombs.
Page 2 of 2Suggested Items
Real Time with... IPC APEX EXPO 2025: New Dispensing and Coating Solutions from Rehm
04/03/2025 | Real Time with...IPC APEX EXPOMichael Hanke, Global Sales Officer at Rehm, discusses new dispensing and coating equipment developed in Germany. He emphasizes the significance of software integration with customer systems to tackle market challenges.
BEST Inc. Presents StencilQuik for Simplifying BGA Rework Challenges
04/02/2025 | BEST Inc.BEST Inc., a leader in electronic component rework services, training, and rework tools is thrilled to announce StencilQuik™ rework stencils. This innovative product is specifically designed for placing Ball Grid Arrays (BGAs) or Chip Scale Packages (CSPs) during the rework process.
Real Time with... IPC APEX EXPO 2025: Nordson's Expansion of Intelligent Technologies
04/02/2025 | Real Time with...IPC APEX EXPOJonathia Ang-Mueller gives an update on Nordson's latest selective soldering system which features a small footprint, offering cost savings and increased production capacity. Advanced software allows for pre-sales simulations, enhancing customer engagement.
Knocking Down the Bone Pile: Basics of Component Lead Tinning
04/02/2025 | Nash Bell -- Column: Knocking Down the Bone PileThe component lead tinning process serves several critical functions, including removing gold plating, mitigation of tin whiskers, reconditioning of component solderability issues, and alloy conversion from lead-free (Pb-free) to tin-lead or from tin-lead to lead-free for RoHS compliance. We will cover each of these topics in more detail in upcoming columns.
Real Time with... IPC APEX EXPO 2025: Innovations at Indium Corporation—A Look into the Future
04/02/2025 | Real Time with...IPC APEX EXPOIndium Corporation, led by CEO Ross Berntson, is making strides in automotive applications with innovative solder paste technologies. The company prioritizes sustainability and energy efficiency in manufacturing while developing its workforce through partnerships with local universities.