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Trouble in Your Tank: Additive, Semi-Additive and Subtractive Fabrication

Introduction
It seems the operative word today is additive circuit board manufacturing, or for that matter, additive for everything. It is true that the use of additive manufacturing technology has found its way into different industries. While there may be several advantages to adopting additive technology in various industries, one should take a step back and truly assess where we are today in relation to conventional and advanced printed circuit board technology. It makes sense to understand the differences between fully additive, semi-additive, modified semi-additive (mSAP) and subtractive. In the end, there are several options available to the fabricator and OEM to achieve high density and ultra-density circuitry to support higher end technologies, including IC substrates.

Overview
In my opinion, there is much confusion with respect to additive fabrication for printed circuit boards. Well over 45 years ago, there was full build (or “fully additive”) circuit technology. One could employ a special pre-catalyzed substrate and build up the circuity with an electroless copper process. However, the circuitry would still need to be formed via subtractive process.

Predating the full build electroless process was the CC4 technology. A microroughened substrate was coated with a metal catalyst, then plated to 25-plus microns over an approximately 24-hour period.

With respect to advanced packaging, where designs require ultra-fine line interposers and substrates, achieving HDI designs that require fine-line interposers with sub 25-40 mm lines and spaces is severely challenged and perhaps near impossible to create copper features with these dimensions. A fully subtractive process is where foil copper, plated copper, and even panel-plated copper requires a significant amount of copper to be etched. Along with undercut concerns, as well as the etch factor, one can see the limitations of such a process. Let’s review some of the options for fine-line and high-density applications.

Microvia technology appeared in the mid-1990s to allow fine-pitch area array semiconductor packages to be surface mounted. Now, microvia technology is used not only on the surface of the board, but also to interconnect to embedded devices—both formed and inserted—and allow “any layer via” board construction for multilayer applications. The IPC Roadmap identifies where the proficiency within different global locations impacts processing operations. There are not many technical issues between geographies, but they can be significant. Sometimes the technical variation deals with what is more prevalent in portable devices produced around the world. Since a fair number of products are produced for semiconductor carrier applications, the metrics on rigid interconnections reflect Japan/Asia/Europe capabilities.

 Build-up Film (Ajinomoto)
The ABF process from Ajinomoto has taken hold in the high density and ultra-high density circuit designs. The process utilizes a dielectric film that then is metalized with a thin deposit of electroless copper. The ABF film is prepared prior to electroless copper by chemically roughening the surface (Figure 1).  A brief overview of the process is detailed in Table 1:

Resin Coated Copper (RCC)
Of course, there are other options as well. The following process uses a material known as RCC or resin-coated copper (Table 2).

RCC has been on the market for over two decades. The dielectric resin is coated onto a copper foil and does not contain any glass. While the un-reinforced resin works well with laser via formation, the RCC does tend to “move” somewhat more than reinforced resins.

Controlled Surface Etch
A less popular method (controlled surface etch or copper thinning) starts with one-half or one-ounce foil and thins the copper to a lower thickness via etching. As an example, one can reduce one-half ounce copper foil layer to one-quarter or one-eighth ounce through cupric chloride or alkaline etching. This seems easier than trying to work with super thin foils from a handling perspective. An advantage of copper thinning is that one has excellent adhesion of the copper to the C-stage laminate.

A version of the process is shown in Table 3.

Emerging Technologies
There are several new processes gaining interest for HDI and ultra HDI. These include SAP type processes using liquid metal inks and other types of seed layer for enabling of metalization of the substrates, with the ultimate goal of achieving sub 1 mil lines and spaces.

In a future column, I will present additional insight into these newer processes along with the advantages for the printed circuit designer.

This column originally appeared in the February 2022 issue of PCB007 Magazine.