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Trouble in Your Tank: Processes to Support IC Substrates and Advanced Packaging, Part 2

Introduction
In last month's column, I framed the initial challenges for the PWB fabricator to be successful in producing IC substrates to support advanced packaging. In this month’s feature, I’ll explore two more areas of processing that fabricators need to master:

• Imaging/developing
• Etching

Fine-line Imaging/Developing
One must understand that photolithography is the cornerstone of advanced packaging and IC substrate production. Laser direct imaging is now a must for high density and ultra-high density substrate fabrication. When pushing the limits of ultra-high density, conventional contact printing falls short. Usher in the development and implementation of laser direct imaging (LDI).

The capabilities of LDI systems provide several advantages over contact printing. Examples include the fabrication of boards with tight registration tolerances. In addition, the pattern is printed directly from the CAD system and does not require a phototool.

With respect to contact printing, registration errors occur due to dimensional changes in either the phototool or the panel. These dimensional changes happen because the materials used for the mask and panel (such as FR-4) vary in size as a function of temperature and humidity (which are controlled in the typical fab environment to ±2°C and ±5% RH, respectively).

There are five steps to creating the circuitry:

• Surface prep
• Resist lamination
• Exposure
• Development
• Etching

Take a close look at the exposure process. With LED/LDI, one hears the term depth of focus (DOF). Setting up the correct DOF is critical to achieve optimum resolution. In turn, incorrect DOF will result in either line or space growth or off-contact and twisted rope defect. It is important then to insure the correct DOF.

Another “must” is to find stress points in the imaging process. One can accomplish this by using test patterns such as fine line spirals or fine lines and spaces. This should include graduated lines and spaces, including 100-, 75-, 50-, 25-micron lines and spaces. It is also important to recognize that this type of evaluation will provide a deeper understanding of additional process parameters that influence the resolution of the image. As an example, higher exposure energies increase resist adhesion. Furthermore, copper foil type (ED, RTF, RA), surface preparation techniques, and development breakpoint influence the resolution of the image. Certainly, never underestimate breakpoint. An example of early breakpoint is shown in the schematic in Figure 1.

Even under ideal exposure energy and surface preparation, the risk of resist width reduction is highly likely. An actual SEM of the issue is shown in Figure 2. Early breakpoint leads to over-developing and undercut. And this causes a reduction of line widths on inner layers.

Etching
Developing and etching are connected at the hip, so to speak. As a cardinal rule of troubleshooting, everything is connected. It is necessary to understand that etching, whether alkaline or acid, is isotropic. This means as copper is etched away in the Z-axis, there is also copper removed laterally.

With respect to etching, key process parameters must be tightly controlled. Alkaline ammoniacal etching is utilized for inner layer and outer layer etching. Regardless, the key parameter to control fine-line etching is the pH of the alkaline etching solution. Maintaining the pH of the alkaline etching solution between 8.0–8.2 enhances the ability of the process to reduce lateral etch and undercut. Certainly, specific gravity of the solution is important as well. Maintaining the specific gravity within the upper range of the control limits reduces lateral etch.

On the other hand, acidic etchants, such as cupric chloride, are used only on inner layers. This etchant is incompatible with metallic etch resists. However, acid etching provides a more favorable etch factor and less undercut than alkaline etching. It has been reported that controlling acid etchants at very low free acid normality improves the etch factor¹.

There were additional studies that compared etch factors with different etchants as well as photoresist thickness. The earlier work of T. Yamamoto, et al,² shows the beneficial effect of wider etch channels and thinner resist. The above referenced work also lends credence to the benefits of cupric etchant in terms of undercut vs. alkaline etchants.

There are circuit density limitations related to subtractive etching. This is a well-known fact of life. The longer it takes for the etchant to remove the unwanted copper, the greater the opportunity for undercut and reduced trace width. Moving to semi-additive processing and thinner copper foils or the use of dielectric films will improve the etch factor significantly. More on these processes in a future column.

Resources

1. “Fine Lines in High Yields, (Part CXXV): Fine Lines—Beyond the Limits of Semi-additive Processing?” by Karl H. Dietz, CircuiTree Magazine, February 2006.
2. “Allowable Copper Thickness for Fine-Pitch Patterns Formed by a Subtractive Method,” by Takuya Yamamoto, Takashi Kataoka, and John Andresakis, CircuiTree Magazine, June 2000, Volume 13, No. 6, pg. 112 (see also Proceedings of the Technical Conference, S-07-3, IPC Printed Circuit Expo, San Diego, CA, April 4-6, 2000).

This column originally appeared in the March 2023 issue of PCB007 Magazine.