Indium Corporation Expert to Present at MiNaPAD 2024
May 27, 2024 | Indium CorporationEstimated reading time: 1 minute
Indium Corporation’s Senior Global Product Manager for Semiconductor and Advanced Materials, Sze Pei Lim, will deliver two technical presentations at the 11th Micro/Nano-Electronics Packaging and Assembly, Design and Manufacturing (MiNaPAD) Forum, taking place June 19-20 in Grenoble, France.
On June 19, Lim will discuss innovative interconnect materials for semiconductor assembly and advanced packaging, particularly for small form factor modules, including solder paste for ultra-fine pitch printing, solders with various melting temperatures for hierarchical soldering, novel ultra-low residue no-clean flux formulations for flip-chip attach that are compatible with underfill and molding compounds, and an adhesive agent for fluxless soldering with a formic acid atmosphere. As advanced packaging continues to drive toward heterogeneous integration, new materials need to be developed to address the many challenges faced in the assembly process.
On June 20, Lim will share the findings from an iNEMI joint collaboration project involving various companies. The presentation will explore the effects of voids on solder joint reliability in first-level interconnect (FLI) by examining the results of three different reliability tests. With the emergence of advanced packaging technology and heterogeneous integration, micro Cu-pillar bump is widely used as FLI. Micro voids are often found in this kind of FLI flip-chip attach and there are limited insights on the effects of voids on the reliability of the flip-chip solder joint.
As the Senior Global Product Manager for Semiconductor and Advanced Materials, Lim works closely with the R&D and manufacturing teams and collaborates with leading semiconductor companies and contract manufacturers around the world. She is a task force member of the International Electronics Manufacturing Initiative’s (iNEMI) Packaging Technology Integration Group and has co-chaired several industry projects and road mapping initiatives over the past five years. She is also a member of the executive committee of the Institute of Electrical and Electronics Engineers (IEEE) Packaging Society Malaysia Chapter. Lim is a part of the organizing committee for the International Electronics Manufacturing Technology (IEMT) and has authored several technical papers. She regularly presents at international technical conferences. Lim earned her bachelor’s degree from the National University of Singapore, where she majored in industrial chemistry with a focus on polymers. She is a Certified SMT Process Engineer and has earned her Six Sigma Green Belt.
Suggested Items
Cross-domain Design: The Key to Managing Complex Methodologies
09/23/2024 | Andy Shaughnessy, Design007 MagazineFor years, Cadence Design Systems has been developing EDA tools that enable the design of ICs and PCBs. Now, as systems continually become more complex, the lines are blurring between these disciplines, and EDA companies are providing designers of PCBs and ICs the ability to understand what’s happening upstream and downstream. We asked John Park, product management group director for advanced IC packaging at Cadence, to discuss this ongoing convergence of domains, as well as what it all means to designers and design engineers.
AI to Boost Wafer Foundry Market by 20%
09/19/2024 | TrendForceTrendForce posits that the wafer foundry market is expected to see a recovery in 2025, with an estimated annual growth of 20%—up from 16% in 2024.
Elementary, Mr. Watson: The Paradigm Shift of Silicon-to-System Design
09/18/2024 | John Watson -- Column: Elementary, Mr. WatsonImagine you were asked to build a city. What approach would you take? In the old way, city planners designed each building independently. They focused on making each building strong, aesthetically pleasing, and valuable. But they didn't always consider how all the buildings would fit together in the city. Roads, power lines, and parks were added later, sometimes making the city confusing or complicated to get around.
IPC White Paper Calls for Comprehensive Roadmap to Address Advanced Packaging to Board-Level Integration Challenges
09/16/2024 | IPCThe increasing complexity of integrated systems demands a holistic approach to design, materials, assembly, reliability, and metrology across all levels of integration, from chip to package to board. IPC’s Technology Solutions group addresses these challenges and suggests a comprehensive roadmap in their new white paper, “Advanced Packaging to Board Level Integration—Needs and Challenges.”
From Silicon to Systems
09/10/2024 | Andy Shaughnessy, Design007 MagazineFor the past few years, IPC has been championing the term “silicon to systems.” More than a buzzword, it has become a slogan—and even a kind of roadmap—for the organization. The term comes in especially handy when IPC is advocating for this industry in Washington, D.C., often addressing politicians who have little understanding of electronics technology.