NIAR Develops 'Chip-level Advanced Packaging Development Platform'

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As the global semiconductor industry enters the post-Moore’s Law era and the demand for Artificial Intelligence (AI) and High-Performance Computing (HPC) surges, advanced packaging has become a core technology determining technological competitiveness and industrial layout. The Taiwan Semiconductor Research Institute (TSRI) of the National Institutes of Applied Research (NIAR) officially unveiled the "Chip-level Advanced Packaging Development Platform" today (1/13). This platform aims to propel Taiwan’s semiconductor industry from "manufacturing leadership" toward a new stage of "system integration and application innovation leadership," securing a critical competitive advantage for the post-Moore era.

Dr. Cheng-Wen Wu, Minister of the National Science and Technology Council (NSTC) and Chairperson of NIAR, stated that future AI applications require chip solutions with higher performance, higher density, and lower power consumption. While the challenges are unprecedented, the opportunities are equally immense. This key opportunity lies in "Advanced Packaging Technology," which serves as the value chain hub connecting "chips to systems and ideas to products". It is the indispensable foundation for key technologies such as silicon photonics, quantum technology, and AI robotics within the "10 New AI Infrastructure Initiatives". Advanced packaging is not just the core battlefield for next-generation semiconductor competition; it will determine Taiwan's future technological leadership," Wu added. The "Chip-level Advanced Packaging Development Platform" developed by TSRI provides Taiwan’s industry, academia, and research sectors with unique chip-level advanced packaging capabilities. Furthermore, it will catalyze Taiwan’s 'Advanced Packaging Innovation Ecosystem,' accelerating the deployment and commercialization of forward-looking physical AI technologies to drive upgrades across all industries.

Advanced Packaging: The Critical Engine to Extend Moore’s Law

As process scaling approaches physical limits, traditional System on a Chip (SoC) designs centered on a single large chip struggle to meet the demands of AI and HPC for high-speed computing, ultra-high bandwidth, and low power consumption. While SoCs offer high integration and low power benefits, they face bottlenecks in performance scaling, on-chip transmission distance, power management, yield, cost, and system architecture flexibility.

Consequently, advanced packaging technology centered on heterogeneous integration has emerged. By integrating different functional chiplets—such as processors, memory, and high-speed transmission—into a 3D package like LEGO blocks, developers can choose the most suitable process for each function. This not only improves yield and reduces costs but also significantly enhances system performance, bandwidth, and energy efficiency while maintaining modularity and future scalability. It has become the definitive path for extending Moore’s Law.

NIAR’s Breakthrough: The Chip-level Advanced Packaging Development Platform

Currently, one of the world's most advanced mass-produced packaging technologies is TSMC’s CoWoS (Chip-on-Wafer-on-Substrate), which achieves high-density integration of computing chips and High Bandwidth Memory (HBM) via an interposer wafer and substrate. However, the presence of the substrate layer brings challenges in cost, signal transmission distance, and process complexity.

TSRI’s new "Chip-level Advanced Packaging Development Platform" introduces a globally forward-looking breakthrough: the CoCoB (Chip-on-Chip-on-Board) packaging architecture. This technology eliminates the traditional substrate, directly connecting the interposer chip to the circuit board. The difficulty of this feat is comparable to placing a large sheet of tempered glass on a floor covered in pebbles while ensuring every single contact point is precisely connected. TSRI successfully overcame surface irregularities by introducing a flowable interface material beneath each micro-solder ball, ensuring reliable bonding across all connection points.

The CoCoB technology offers two major advantages: first, it significantly shortens signal transmission paths, enhancing integration density and system performance; second, it reduces substrate costs and process complexity. This makes it particularly suitable for academic research units and startups to conduct high-flexibility, low-cost heterogeneous integration experiments. Industry experts believe this "substrate-less" architecture will be a vital direction for next-generation AI chips, further validating the strategic value of TSRI’s CoCoB technology.

Driving the Next AI Silicon Revolution

Due to the global shortage of advanced packaging capacity, academic and startup teams have long struggled to access cutting-edge packaging resources. The "Chip-level Advanced Packaging Development Platform" established by NIAR leverages national-level research energy to fill this critical gap in Taiwan’s semiconductor innovation ecosystem.

This open R&D platform supports the integration of processors and HBM required for HPC, as well as diverse heterogeneous chips for biomedicine, environmental sensing, photonics, and power management. It is ideal for prototype verification and advanced application development. To date, it has attracted 16 research teams from domestic and international universities, including the National Taiwan University, the National Tsing Hua University, the National Yang Ming Chiao Tung University, the National Cheng Kung University, the National Chung Hsing University, and the National Taiwan University of Science and Technology, as well as prestigious international institutions such as Stanford University (US), the University of California (US), the University of Toronto (Canada), and the Technical University of Munich (Germany). These teams are engaged in the design and verification of diverse chip modules for AI computing, high-frequency communication, sensing, silicon photonics, and power chips.

Overall, the "Chip-level Advanced Packaging Development Platform" delivers four core values. First, technologically, it achieves breakthroughs beyond Moore’s Law by integrating sensing and computing to power Physical AI and system-level innovation. Second, economically, it pioneers a new semiconductor model focused on "Sensing + Packaging + System Integration." Third, industrially, it strengthens the ecosystem by bridging industry, academia, and research to accelerate the commercialization of frontier technologies. Finally, in terms of international collaboration strategy, it provides academic and research institutions with access to top-tier global technologies, fostering cross-border and multi-disciplinary cooperation.

TSRI emphasized that with the establishment of this platform, Taiwan is moving beyond the competition for process nodes and single chips. Instead, the nation is officially entering a new era of semiconductor competition focused on system integration and application innovation, continuing to consolidate Taiwan’s indispensable position in the global semiconductor industry.