Estimated reading time: 15 minutes

Current Flow on Traces, Part 1: Transmission Lines

I’m going to give you two pieces of information and ask you if they can both be true at the same time.

1. A controlled impedance, 50 ohm, 12 inch long trace exists on a PCB. The trace is not connected to anything at the far end (i.e., it is open). The trace is driven by a driver with a very fast rise time, say a few picoseconds. The driver voltage is 1.0 volt. Then, by Ohm’s Law, the current down the trace is 1.0/50 = 20 ma. Since the driver reaches full output in a few picoseconds, and since the trace is 2.0 ns long (12 inches at 6 inches per ns), the 20 ma signal travels for almost 2 ns before it reaches the far end of the trace.

2. As I emphasized in a prior column (see Note 1), current must flow in a closed loop and current is constant everywhere in that loop.

The trace referenced in A is not a closed loop. It is an open circuit. But the driver doesn’t know that, and can’t know that for almost 2 ns, until the signal reaches the far end, and maybe for almost 2 ns more until the signal can travel back to the driver. So, if current can only flow in a closed loop, how can the signal get to the far end of the trace to see what the conditions are there?

For PCB designers who don’t have a degree in electrical engineering, this can be a puzzling question. In fact, many degreed engineers have trouble correctly analyzing this situation. But an understanding of what is happening when a signal travels down a trace can be very helpful for board designers in understanding subsequent signal integrity issues.

Properly Terminated Line:

Let’s start with the assumption that the trace is truly a controlled impedance trace. And let’s further assume for the moment that it is properly terminated (with a 50-ohm resistor at the far end.) Neither of these are necessary assumptions, but it simplifies a couple of things. You might remember from other articles or classes that the return signal on a high-speed controlled-impedance trace returns on the plane directly under the trace. Then let’s look at a model of what a controlled impedance trace looks like. And it looks just like a transmission line. That’s why we designed it as a controlled impedance trace in the first place. A model of a transmission line is illustrated in Figure 1. The figure shows a model of a line with a current pulse (signal) starting to flow down the line.

Figure 1. Model of a transmission line with a signal starting to flow.

Before we look too closely at this model, it is important to note one of its more serious shortcomings. A transmission line is characterized by inductance along the trace and capacitance between the signal line and its return path. Again, in the case of a transmission line on a PCB, the line is the trace and the return path is on the plane directly under the trace. Now the inductance and capacitance are distributed evenly along the line. We don’t know how to draw a distributed inductance and capacitance, so we show the lumped equivalents in the model instead. So this is called a lumped model of a transmission line.

Assume we have switched the driver at the left end of the line from a logical zero to a logical one, and then back to a logical zero. That is, we are sending a pulse signal that is traveling from left to right down the trace. This signal is represented at the top of the figure. In the lumped model, the signal starts to charge the first capacitor along the line. As that capacitor begins to charge up, it begins to charge the next capacitor in the line. As that capacitor begins to...well, you get the idea. Remember, this is happening along a distributed capacitance, not with individual lumped capacitors, but we don’t know how to draw the distributed case.

Now we can see that current really is flowing in a loop. It is flowing down the trace, through a “capacitor,” and back on the return path. As each “capacitor” charges up, the signal progresses to the next “capacitor” in line. It continues to do that until it reaches the far end of the trace.

Figure 2 is an animated GIF that shows what happens as the pulsed signal travels down the trace. Since this is a properly terminated trace, the signal stops at the far end and does not reflect back.

Figure 2. Animated GIF of a signal propagating down a properly terminated trace.

The next question that some PCB designers ask is, “Why is the signal absorbed at the far end of a (properly terminated) trace?” To help explain this, we need to consider the terms energy and power. Technically they are not the same thing. Energy is the amount of work that can be performed, and power is the rate at which work is actually performed. For the following discussion, the concepts are pretty much the same so I am going to use the terms interchangeably. The energy propagating down the trace can be represented by electrical power. Power is defined as voltage times current (Note 2).  Under the assumptions we started with, this is 1.0 volt x 20 ma or 20 mw. Since we are dealing with an ideal transmission line model here (i.e., there is no resistance), no power is dissipated along the trace. That means that all the energy that enters the trace propagates to the far end.

If the trace is properly terminated with a 50-ohm resistor, then when the signal reaches the far end we have 1.0 volts across a 50-ohm resistance. The amount of power that is dissipated in a resistor under these conditions is given by the formula V2/R, or 1.02/50, or 20 mw. It turns out that exactly the same amount of energy that enters the trace at the driven end is dissipated by the resistor (and turned into heat) at the far end. There is NO energy left to account for or to go anywhere. Thus, there is no reflection.

Improperly Terminated Lines

Figure 2 is an animation of how current flows along a properly terminated line. But what happens when the line is not terminated correctly? Figures 3 and 4 are animations of such cases. Figure 3 illustrates current flow down an open (unterminated) line, and Figure 4 illustrates the case of a shorted line.

Figure 3. Animation of current flow down an unterminated transmission line.

When the energy reaches the far end of an open line, there is no place for it to go. At some point, the (distributed) capacitance at the end of the line fully charges. But the (distributed) inductance of the line tries to keep pushing the current down the line, charging the capacitance even more. At some point, the capacitance “pushes” back, and current starts flowing back up the line to the driver. This is called a reflection.

Any time there is an impedance mismatch at the far end of the line, part of the signal gets reflected back up the line again. In the case of an open (unterminated) line all of the energy is reflected back.

Figure 4. Animation of current flow down a shorted transmission line.

Conversely, Figure 4 illustrates what happens when the current pulse reaches the far end of a shorted transmission line. The inductance along the line tries to keep the current flowing, and it sort of “wraps” around the end and starts charging the capacitance along the line from the bottom side. Thus, there is a reflection, but this time the current turns around and starts traveling up the return side of the line. This is called a negative reflection because the algebraic sign of the reflection is reversed from the primary signal.

Reflection Coefficient

This now raises two additional interesting questions. How do we know what the sign of the reflection will be, and what happens if there is some termination at the end of the line, but it is not the proper size for the line? The answer to these questions lies in the “reflection coefficient.”

If we have an ideal transmission line with characteristic impedance equal to Z, the (voltage) reflection coefficient (p) is the ratio of the reflected voltage to the incident voltage and is given by the expression:

p = (RL – Z)/(RL + Z)                          [Equation 1]

So if the line is correctly terminated in a resistance RL equal to Z, then the numerator of this term goes to zero – there is no reflection. If the line is open (i.e., RL is infinite), then the expression reduces to RL/RL or 1.0 . That is, the reflection is 100 percent and it is of the same sign as the driving voltage. If the line is shorted, the reflection coefficient reduces to –Z/Z or -1.0. That is, the reflection is again 100% but in this case it is of the opposite sign. If there is any other value of termination at the end of the line, simply plug that value into the reflection coefficient equation to find the magnitude of the reflection. If RL is less than Z, the reflection will be negative in sign. If RL is greater than Z, the reflection will be positive in sign. (See Note 3.)

Differential Traces

Figure 5 is an animation of what happens with differential traces. In the top part of the figure a signal propagates down a differential pair; in the bottom part the same signal travels down a single-ended trace for comparison. Each side of the differential pair looks just like its single-ended counterpart. In effect, we treat each trace individually, with the return signal traveling on the plane directly underneath the trace.

Figure 5. Animation of signal down a differential pair.

Some designers argue that differential traces should be routed close together for EMI reasons. The argument is that the current down and back (on the traces) forms a loop and EMI is related to loop area. Therefore, if we want to minimize the loop area, we do so by routing the traces as close to each other as possible. Others argue that since the signal return is directly underneath the trace, the loop area does not depend on trace separation, and there is no need to route the traces close together (see Note 4.)

I believe Figure 5 illustrates only part of the story. Look at what happens when the pulse reaches the far end of the trace, as shown again in Figure 6. The primary differential signal wraps around from the top trace, through the terminating resistor, and back on the bottom trace. The return signal that was on the plane has now become a sort of eddy current on the plane. At this specific point in time, we still have two counter-rotating loops of current that are equal. They generate equal but opposite electromagnetic fields, and any EMI generated by them cancels out. So far, so good.

Figure 6. Current loops when signal reaches the far end of the trace(s).

But the problem, I believe, is that the eddy current on the plane dies out (there is no energy source keeping it going). When it does die out, there is no longer a counter electromagnetic field countering the primary signal field. Thus, there now is the potential for EMI to be generated by the primary differential signal. This might be a very short period of time, beginning as the “eddy current” dies out and ending when the signal begins to change state again. One might even think of it as being the changing “eddy current” that is generating the EMI. In any event, it is for this reason that I believe differential traces should be routed close together.

The EMI aspect of this is really difficult to analyze. It is not so much a rise time issue as it is a frequency issue. And the issue also depends on the relationship between the propagation time down the trace and the duty cycle of the waveform.  In some cases there might not be any EMI radiated at all. In other cases there may be some. I know of no definitive studies (or even theory) that can say with certainty what happens under these types of conditions. All I know is when we designers pretty much have to get it right the first time, conservatism says (to me) to route the traces close together.

Straight Wire

We have looked at the current loops for a signal traveling down a well-controlled transmission line. What about something much less controlled, for example a straight wire antenna. How can a signal travel along a wire antenna when there is no (apparent) return loop?

Well, there is a return loop, just as there is for a well-controlled transmission line. It just isn’t apparent. Antenna theory is a very complex subject. But in general, antennas are referenced to a return, often “ground.” An antenna installation may provide a real ground:

1. It may be metal rods extending away from an antenna tower.
2. It may be a metal structure near the antenna main elements.
3. It may be a structural part of the antenna.
4. In the case of automobiles, it may be the metal body of the car.

In other cases an antenna may just rely on Earth ground – literally the dirt around the base of the antenna. In any case, there is some capacitance between the antenna array and whatever “ground” is being utilized. And there is inductance associated with the antenna line itself. Therefore, even a straight wire (sometimes referred to as a “wire in space”) has the characteristics of a transmission line, and it has a characteristic impedance (Note 5.)

Conclusion

Any wire or trace can be thought of as a transmission line. It may be intentionally well controlled, or it may be totally uncontrolled. Current propagates down such lines by utilizing the distributed capacitance between the lines and the return path, wherever it is. There will always be reflections from impedance discontinuities along, and at the end, of the line (the single exception being a properly designed, uniform transmission line terminated at the end with the proper terminating resistor.) The real question is whether we care about such reflections. We may care depending on the relationship between the propagation time down the trace and the rise time of the signal flowing on the trace. That relationship determines the so-called “critical length” of the line, a concept we often see in signal integrity discussions.

Technical Appendix

I will present here one possible analysis of what happens when the frequency is low enough. Assume a clock pulse traveling down a differential pair. Assume it is a symmetrical square wave with period t. Assume the coupled region has a length longer than t/2. Then the current loop on the plane will be continuously reinforced before the rising or falling edge of the clock pulse reaches the far side of the differential pair.

Now assume the length of the coupled region is shorter than t/2. This case is shown in Figure A1.

Figure A1. Waveforms if the coupled region is shorter than one-half the period of the signal traveling down the differential pair. The top waveform is the signal traveling down the pair, if the returns are on the plane. The bottom waveform is the signal around the differential loop where the returns are not on the plane under the pair. Dimensions A, B, and C are defined in the text.

And let’s make two other assumptions:

1. The rising and falling edges of the clock pulse have zero rise and fall times (this is a worst case assumption)
2. When the rising or falling edge reaches the far side of the coupled pair, the current flow on the plane decays instantly (this is also a worst case assumption.)

The top waveform in Figure A1 is the clock waveform. The bottom waveform is the part flowing around the loop formed by the two traces. The dimensions shown on the waveform are as follows:

1. A is one-half the period of the clock waveform.
2. B is the length of the coupled region.
3. C is A minus B, and is the width of the pulse on the differential pair that is NOT accompanied by a corresponding current loop on the plane.

The bottom waveform represents the signal traveling around the differential pair loop. It is zero most of the time, because the return signals during time B are on the plane under each of the pairs. But for time C there is no return signal on the plane. This series of pulses is traveling around the loop formed by the differential traces. It is this current loop that may be causing an EMI problem. The amplitude and rise time of the bottom trace will be mitigated if we relax the two assumptions above. This is what makes this situation so difficult to analyze.

Bottom line: We are not really sure what happens when the propagation time down a differential pair is shorter than one-half the period of the driving pulse. That is why I advocate routing differential traces close together.

Notes

1. See my column “What is Current And Why Do We Care?”
2. See my article “Resistance, Reactance and Impedance, Part 1”
3. There is a transmission line simulator available for download on the UltraCAD website. Go to www.ultracad.com  and select the “Simulations” menu item. It allows you to select arbitrary values for Z, RS and RL, and the shape of the driving pulse, and then see a visual indication of the reflections traveling back and forth along the line.
4. Eric Bogatin has passionately argued the latter point to me in a series of e-mails. This is one area where there is honest disagreement among professionals. See my column “Why Should We Believe YOUR Design Rules?”
5. The characteristic impedance of a “wire in space” is often given as between 300 and 400 ohms.

Douglas Brooks has an MS/EE from Stanford University and a Ph.D. from the University of Washington. He has spent most of his career in the electronics industry in positions of engineering, marketing, general management, and as CEO of several companies. He has owned UltraCAD Design Inc. since 1992. He is the author of numerous articles in several disciplines, and has written articles and given seminars all over the world on Signal Integrity issues since founding UltraCAD. His book, Printed Circuit Board Design and Signal Integrity Issues was published by Prentice Hall in 2003. Visit his Web site at www.ultracad.com.