Configurable Analog Chip Computes with 1,000 Times Less Power than Digital

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The FPAA device includes a small amount of built-in digital circuitry that supports communication within the chip and also helps run the programming infrastructure. Utilizing these support features, the team has developed an extensive set of high-level programming tools to take advantage of the new chip.

Among other things, the new toolset is designed to make working with analog arrays accessible to those familiar with digital designs like FPGAs, which are programmed using comparable high-level tools. The new toolset can both simulate and program the FPAA reconfigurable device. A paper detailing these high-level tools has been published online.

“Our toolset uses high-level software developed in the Scilab/Xcos open-source programs, with an analog and mixed-signal library of components,” Hasler said. “Georgia Tech undergraduates are already using these tools in classes in the School of Electrical and Computer Engineering that cover mixed-signal and analog devices and tools.”

One area in which the analog approach is notably powerful involves command words – voice recognition technology used in devices like smartphones to do such things as wake up circuits from an off state, Hasler said. Like traditional analog sensing circuits, an FPAA offers excellent context-aware capability at extremely low power states.

Hasler said that she has talked with several companies about potential applications of the FPAA in commercial devices. A significant number of FPAA chips has already been produced, but plans for potential large-scale manufacture of the chips have not been finalized. The key technologies in the FPAA system-on-chip are patent pending.

“We believe that analog technology offers very powerful ways to look at physical computing, with considerable potential for commercial, neuromorphic, military and other applications,” Hasler said.

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