Strategies for Developing Copper Plating SystemsOctober 16, 2017 | Patty Goldman, I-Connect007
Estimated reading time: 4 minutes
I met with Dr. Albert Angstenberger, global technology manager for metallization with MacDermid Enthone Electronics Solutions, while at SMTA International. He presented a most interesting paper on copper pillar plating systems that we hope to publish in The PCB Magazine sometime in the future.
Patty Goldman: Albert, I understand you presented a paper here on copper pillar plating systems. How was it received?
Albert Angstenberger: Yes, that’s correct. It went well. To some extent I think I overshot the audience, maybe the firework was too big, because to me it seemed like these people would be to some extent stunned.
Goldman: Tell me about the paper. What was it about?
Angstenberger: It was about copper plating, particularly the strategies, how we develop new plating chemistry for electroplating, copper metallization of printed circuit boards and organic substrates or silicons. Getting away the heat and coping with the speed.
Right now, we have merged MacDermid and Enthone, so at the end of the day we have combined our capabilities and our strengths. As far as metallization and copper plating is concerned, we're covering almost every aspect of interconnect technology—starting from the die, rerouting the die down to the printed circuit board and with all the intermediate steps. My paper was dealing with the copper plating of whatever kind of substrate.
So, it's all about our company's strategies, technical strategies, what we do to develop suitable plating chemistry for successfully copper-plating very tiny through-holes, and a very tiny bump-up to microscopic through-holes.
Goldman: Tell me more about the thermal management part of it.
Angstenberger: One of the two most important aspects is to get the heat away from the die, through the various substrates, through the printed circuit board and out into the environment. That's one aspect. The other aspect is to provide very fast interconnections—frequency. So, the shortest interconnections from the die through the substrate to the exterior to the interfaces without any major concerns, as far as parasitics are concerned, like undistorted signal propagation.
When I grew up in that industry, we did a lot of wire bonding. To some extent, it was a painful exercise because once you wire bond, in particular with high-frequency applications, you had to consider the signal losses or parasitic effects, like capacitance or inductance issues. Right now, our whole industry is in a very good technological position to provide very fast, very short tracks for signal propagation, as well as to get away the heat. This doesn’t just relate to the high-frequency applications but also to simple technological applications like LEDs, for instance.
Goldman: They make a lot of heat.
Angstenberger: Yes, they do. The hotter they get, the more they degrade over time. In my younger days, I would have called it the thermal suicide of an integrated circuit. Most of the interconnect applications are trying to get as much copper pillar or copper bump interconnects to cope with the heat, of course, and to cope with the high-frequency aspects.
Goldman: I find that very interesting. Tell me more about your background.
Angstenberger: I got started in the printed circuit industry in '83 with a small- to medium-sized enterprise in Germany called Leitron. There have been a couple of companies with that name. When we started, it was about 50−60% PCBs going into the computer business. In those days, there was an American company coming up to the market with the first, believe it or not, foldable laptop. It was a very easy catch, not very sophisticated. The company was named Conversion, and they were one of our first and biggest customers where we were providing two-layer, four-layer, even six-layer boards. Prior to that, more of our customers were military, defense, aerospace and space application.
Goldman: You were making the leading-edge boards at the time, right?
Angstenberger: Yes, in those days. I guess it was like '84, '85 when we were probably one of the first companies in the world doing blind and buried vias, sequential lamination. Of course, just to complete the orchestra we did copper-clad, metal cores, heavy metal copper, 0.3 millimeter, 0.5 millimeter metal cores being incorporated into the board.
After Leitron, I went to Hewlett-Packard on the German side in Boeblingen. When I joined HP, it was like 13 different global printed circuit shops. When I left HP, there was only one left, which was the Boeblingen site. Then I was freelancing for six years or so, working for mostly European big printed circuit shops helping with engineering, helping with troubleshooting and all that. It was in '98 when I joined the company Diehl, which is in defense. I was responsible for development marketing and sales of miniaturized mil spec computers.
And after that I joined Taconic, the PTFE laminate manufacturer for some nine years . I took one year off because I had my spine screwed together due to some kind of misalignment. Then about four years ago some headhunters grabbed me by the hair for MacDermid. I'm global technology manager for metallization, so I act as an interface between the customer’s new requirements and our applications, our R&D, etc. The easiest way to describe it is like I’m a spokesman.
Goldman: Well, that’s quite a career. Anything more about your paper or thermal management that you'd like to add?
Angstenberger: Not necessarily. What I was trying to provide people with is a thread about the strategy and how to get the heat away from the die through the environment. Also, how to improve electrical or signal characteristics. On the other hand, it was also to tell the people something about our strategies and what we do to provide very effective, well-functioning electroplating and copper plating products.
Goldman: Albert, thank you.
Angstenberger: You're welcome.
There has always been pressure to reduce line and space as we have seen the bleeding edge technology go from 8 mils to 5 mils and then to 3 mils. The difference between “then” and “now” is that the prior advancements, for the most part, used the same processes, chemistry and equipment going from 8 mils to 3 mils. But going from 3 mil to sub 1 mil trace and space is a quantum leap in printed circuit board (PCB) technology that requires a whole new set of processes and materials.
In a previous column, the critical process of desmear and its necessity to ensure a clean copper surface connection was presented. Now, my discussion will focus on obtaining a void-free and tightly adherent copper plating deposit on these surfaces. After the desmear process, the task is to insure a continuous, conductive, and void-free deposit on the via walls and capture pad. Today, there are several processes that can be utilized to render vias conductive.
Panasonic’s Darren Hitchcock spoke with the I-Connect007 Editorial Team on the complexities of moving toward ultra HDI manufacturing. As we learn in this conversation, the number of shifting constraints relative to traditional PCB fabrication is quite large and can sometimes conflict with each other.
MKS’ Atotech, a leading surface finishing brand of MKS Instruments, will participate in the upcoming IPCA Expo at Bangalore International Exhibition Centre (BIEC) and showcase its latest PCB manufacturing solutions from September 13 – 15.
Flexible circuit applications can be as basic as furnishing electrical interconnect between two conventional circuit board assemblies, or to prove a platform for placing and interconnecting electronic components. During the planning and pre-design phase of the flexible circuit, there will be several material and process related questions that need to be addressed. Most flexible circuit fabricators welcome the opportunity to discuss their customers’ flexible circuit objectives prior to beginning the actual design process.