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Two years after launching its state-of-the-art PCB facility, SEL shares lessons in vision, execution, and innovation, plus insights from industry icons and technology leaders shaping the future of PCB fabrication.
Sales: From Pitch to PO
From the first cold call to finally receiving that first purchase order, the July PCB007 Magazine breaks down some critical parts of the sales stack. To up your sales game, read on!
The Hole Truth: Via Integrity in an HDI World
From the drilled hole to registration across multiple sequential lamination cycles, to the quality of your copper plating, via reliability in an HDI world is becoming an ever-greater challenge. This month we look at “The Hole Truth,” from creating the “perfect” via to how you can assure via quality and reliability, the first time, every time.
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Uyemura Expands US Pacific Rim Service Capacity
May 24, 2017 | UyemuraEstimated reading time: Less than a minute
Jose Alonzo Garcia is Uyemura’s new technical service engineer for a key territory that includes Northern California, Washington, and Oregon. The appointment was formalized May 8th by Uyemura Vice President Don Gudeczauskas.
Garcia’s responsibilities include process troubleshooting, line audits, chemical installations and assisting customers with root cause analysis.
Garcia holds a Bachelor of Science, Chemical Engineering from San Jose State University. Most recently, he was with Streamline Circuits, a manufacturer of rigid, rigid-flex, and multilayer PCBs, where he applied SPC principles to optimize electroplating processes. In late 2016, Garcia helped qualify a new gold bath in the company’s ENIG line. The new line was TAM-55, an advanced, low-acidity immersion gold that protects the solderability of the electroless nickel in an ENIG deposit.
Garcia has a special interest in kinetics and reactor design, FMEA, and environmental management.
For more information click here.
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Trouble in Your Tank: Minimizing Small-via Defects for High-reliability PCBs
08/27/2025 | Michael Carano -- Column: Trouble in Your TankTo quote the comedian Stephen Wright, “If at first you don’t succeed, then skydiving is not for you.” That can be the battle cry when you find that only small-diameter vias are exhibiting voids. Why are small holes more prone to voids than larger vias when processed through electroless copper? There are several reasons.
Trouble in Your Tank: Metallizing Flexible Circuit Materials—Mitigating Deposit Stress
08/04/2025 | Michael Carano -- Column: Trouble in Your TankMetallizing materials, such as polyimide used for flexible circuitry and high-reliability multilayer printed wiring boards, provide a significant challenge for process engineers. Conventional electroless copper systems often require pre-treatments with hazardous chemicals or have a small process window to achieve uniform coverage without blistering. It all boils down to enhancing the adhesion of the thin film of electroless copper to these smooth surfaces.
Day 1: Cutting Edge Insights at the EIPC Summer Conference
06/17/2025 | Pete Starkey, I-Connect007The European Institute for the PCB Community (EIPC) Summer Conference took place this year in Edinburgh, Scotland, June 3-4. This is the second of three articles on the conference. The other two cover the keynote speeches and Day 2 of the technical conference. Below is a recap of the first day’s sessions.
Uyemura Expands Engineering Team in Great Lakes Region
05/30/2025 | UyemuraAndrew Jin has joined Uyemura’s Engineering Team as Technical Service Engineer for the Midwest. Jin was formerly with Sensient Technologies, Flavors and Extracts Division, where his focus was CO2 emissions and water quality; he also did capital project work with production equipment.
Trouble in Your Tank: Causes of Plating Voids, Pre-electroless Copper
05/09/2025 | Michael Carano -- Column: Trouble in Your TankIn the business of printed circuit fabrication, yield-reducing and costly defects can easily catch even the most seasoned engineers and production personnel off guard. In this month’s column, I’ll investigate copper plating voids with their genesis in the pre-plating process steps.