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From the growing role of AI in design tools to the challenge of managing cumulative tolerances, these articles in this issue examine the technical details, design choices, and manufacturing considerations that determine whether a board works as intended.
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Atotech to present at the iMAPS Device Packaging Conference in Fountain Hills, Arizona USA
February 24, 2020 | AtotechEstimated reading time: 1 minute
Atotech, a leading global provider of electroplating and surface-finishing chemicals and equipment for PCB, semiconductor advanced packaging and dual damascene applications, is pleased to announce its participation in the iMAPS Device Packaging Conference held at the WekoPa Resort in Fountain Hills, Arizona, on March 3?5, 2020.
Atotech expert Dr. Britta Schafsteller will present at the Advanced Packaging & Emerging Materials for Automotive, 5G & Next Gen Applications track in room 102-103 on Thursday, March 5, from 10:45?11:15 a.m. Her presentation is entitled, “Autocatalytic tin—how to overcome process limitations to introduce a new solution for thick tin plating.” In her presentation, Dr. Schafsteller will show exemplary tin deposits, which were plated with an autocatalytic electrolyte comparing their layer properties to those of other conventional final finishes like immersion tin or electroless nickel/immersion gold (ENIG).
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Advanced Packaging for AI: Reliability Starts at the Cu/Cu/Cu Microvia Junction
04/20/2026 | Kuldip Johal, MKS' AtotechThe rapid growth of AI computing, from training clusters to inference at scale, is reshaping demand across the entire electronics supply chain. Advances in technology requirements, such as higher bandwidth, lower latency, and greater compute density, are driving the development of advanced packaging technologies and transforming the PCB industry across design, manufacturing, testing, and even architecture.
Trouble in Your Tank: Understanding Interconnect Defects, Part 2
12/03/2025 | Michael Carano -- Column: Trouble in Your TankPart 1 of this two-part series presented a more detailed look at the underlying causes of interconnect defects (sometimes known as interplane separation), with these three modes of interplane separation: Type 1: Separation of the electroless copper deposit from the interconnect; Type 2: Separation of the electrolytic copper deposit from the electroless copper deposit, but the electroless remains on the post; Type 3: Cohesive failure of the electroless, whereby the electroless copper deposit actually separates from itself.
Uyemura Opens Dedicated UBM and Prototype Plating Line at Southington Tech Center
11/25/2025 | UyemuraUyemura has commissioned a dedicated plating tool at its Southington, CT Tech Center that addresses 3 urgent needs.
Connect the Dots: The Future of Designing for Reality—Electroless Copper
11/26/2025 | Matt Stevenson -- Column: Connect the DotsOn a recent episode of I-Connect007’s On the Line With… podcast, we discussed electroless copper deposition—depositing a thin copper layer into the through-holes and vias of what will eventually become a printed circuit board. Specifically, it is a chemically catalyzed deposition of copper, mainly to the epoxy inside the holes (as well as on the entire surface of the board). Electroless differs from electrolytic in that electrolytic deposition relies on electricity.
Trouble in Your Tank: Understanding Interconnect Defects, Part 1
11/04/2025 | Michael Carano -- Column: Trouble in Your TankThis month, I’ll address interconnect defects (ICDs). While this defect continues to rear its ugly head, don’t despair. There are solutions, most of which center on process control and understanding the relationship of the chemistry, materials, and equipment. First, though, let’s discuss ICDs.