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Current IssueThe Hole Truth: Via Integrity in an HDI World
From the drilled hole to registration across multiple sequential lamination cycles, to the quality of your copper plating, via reliability in an HDI world is becoming an ever-greater challenge. This month we look at “The Hole Truth,” from creating the “perfect” via to how you can assure via quality and reliability, the first time, every time.
In Pursuit of Perfection: Defect Reduction
For bare PCB board fabrication, defect reduction is a critical aspect of a company's bottom line profitability. In this issue, we examine how imaging, etching, and plating processes can provide information and insight into reducing defects and increasing yields.
Voices of the Industry
We take the pulse of the PCB industry by sharing insights from leading fabricators and suppliers in this month's issue. We've gathered their thoughts on the new U.S. administration, spending, the war in Ukraine, and their most pressing needs. It’s an eye-opening and enlightening look behind the curtain.
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Real Time with… SMTAI 2020: Technical Conference Review
October 6, 2020 | Real Time with...SMTAIEstimated reading time: 16 minutes
Carmichael Gugliotti, MacDermid Alpha Electronic Solutions
#655: Single-Step Metallization Process for the Filling of Through-Holes With Copper Pulse Plating, Through-Holes, Copper-Filled, Thermal Management
Gugliotti’s paper discusses a copper plating process capable of filling through-holes with solid copper in one step for applications, such as core layer through-hole filling with minimal surface copper buildup for HDI technologies and thermal management of heat-sensitive electronics. The advantages of the single-step filling process benefit both the technology and the fabricator regarding the copper through-hole filling for the core.
Figure 19: New single-step through-hole filling.
Gerry Partida, Summit Interconnect
#902: Microvias: Is Your Product Reliability at Risk?
Partida’s presentation reviewed concerns and reliability testing of micro vias. He provided an overview of the HDI process and presented the use of current test methods and the superiority of testing with IPC-D-coupon and IPC-TM-650 test methods 2.6.7.2 and 2.6.27. He also discussed the warning statement in the forthcoming IPC-6012E (Qualification and Performance Specification for Rigid Printed Boards).
To emphasize his proposition, Partida presented test data from actual orders that showed that only these new IPC standards could detect all latent microvia defects. The higher temperatures of lead-free reflow are the main causes of this type of defect, and only four-wire testing at these temperatures will reveal them.
Figure 20: Detecting latent microvia failures in test.Page 6 of 7
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