Facing the Future: Challenges and Opportunities in Reshoring PCB Manufacturing
It’s Only Common Sense: Stop Chasing New Customers and Start Keeping the Ones You Have
Driving Innovation: Inner Layer Alignment Methods in PCB Production
Analog Devices’ RadioVerse SoC Drives 5G Radio Efficiency and Performance
December 10, 2021 | Business WireEstimated reading time: 2 minutes
Analog Devices, Inc. announced a breakthrough RadioVerse System-on-Chip (SoC) series providing radio unit (RU) developers with an agile and cost-effective platform to create the most energy efficient 5G RUs in the industry. The new SoC series provides advanced RF signal processing with expanded digital functionality and RF capacity that greatly improves 5G RU performance and energy efficiency. The SoCs are the newest addition to ADI’s RadioVerse ecosystem and combine its award-winning Zero IF (ZiF) architecture with significant advances in functional integration and linearization. ADI’s RadioVerse devices are the most widely used software-defined transceivers in 4G and 5G RUs worldwide.
“Samsung and ADI have long worked together to support the swift deployment of 5G in the global market,” said Dong Geun Lee, Vice President and Head of Hardware R&D Group, Network Business at Samsung Electronics. “We are excited for the successful launch of ADI’s new SoC, as we expect this cutting-edge technology will bring better 5G experience to consumers. We look forward to expanding our engagement with ADI.”
Demand for power efficient RUs is expanding rapidly as global network operators race to deploy 5G infrastructure. With the exponential growth of wireless demand, energy efficiency is a key metric for operators as they seek to reduce their carbon footprint while expanding network capacity. The new RadioVerse SoC series requires very low power compared to alternatives and implements advanced algorithms that deliver optimal RU system efficiency.
“RadioVerse SoCs are designed to optimize the full radio solution rather than just a single component or interface,” said Joe Barry, Vice President of Wireless Communications at Analog Devices. “Each successive generation has provided expanded capabilities, bandwidth and performance, while improving overall RU efficiency. This new RadioVerse SoC series takes a big step forward by delivering multiple advancements in signal processing to meet the demanding needs of 5G.”
The ADRV9040 is the first in the new RadioVerse SoC series. It offers eight transmit and receive channels of 400MHz bandwidth and integrates advanced digital signal processing functions, including carrier digital up-converters (CDUC), carrier digital down-converters (CDDC), crest factor reduction (CFR) and digital pre-distortion (DPD). This expanded signal processing can eliminate the need for a field-programmable gate array (FPGA), thereby reducing thermal footprint, and total system size, weight, power, and cost. The SoC’s DPD algorithms were developed using advanced machine learning techniques and are optimized in close collaboration with major power amplifier (PA) vendors to ease the design burden and deliver best-in-class wide bandwidth performance. The algorithms are fully tested and validated across 4G and 5G use cases, including various PA technology types such as gallium nitride (GaN). In addition, the ZiF radio architecture simplifies RF filtering and signal chain components, reducing RU cost and development time for band and power variants designs.
Share on:
Testimonial
"The I-Connect007 team is outstanding—kind, responsive, and a true marketing partner. Their design team created fresh, eye-catching ads, and their editorial support polished our content to let our brand shine. Thank you all! "
Sweeney Ng - CEE PCBSuggested Items
Materials and Manufacturing for the AI Era: The Next PCB Frontier
08/08/2025 | Edy Yu, Chief Editor, ECIO, and the I-Connect007 Editorial TeamAI is pushing hardware to its limits, and the bottleneck isn’t design anymore—it’s materials. Next-generation AI servers aren’t just heavier on layer counts. They demand better materials to handle the speed, heat, and signal integrity requirements of 400G, 800G, and even 1.6T Ethernet systems. Many server motherboards are already 32–36 layers. For the next wave of 1.6T-capable boards, expect 40–50 layers, which must maintain high-frequency performance without degrading signal quality.
Beyond Design: Refining Design Constraints
07/17/2025 | Barry Olney -- Column: Beyond DesignBefore starting any project, it is crucial to develop a thorough plan that encompasses all essential requirements. This ensures that the final product not only aligns with the design concept but is also manufacturable, reliable, and meets performance expectations. High-speed PCB design requires us to not only push technological boundaries but also consider various factors related to higher frequencies, faster transition times, and increased bandwidths during the design process.
Why I Finally Embraced Autorouting
07/03/2025 | Stephen V. Chavez, Siemens EDAHere is a common misconception held by those who don’t fully understand the PCB layout process or how to wield today’s high-level EDA tools: "All I need to do is push the autorouter button, let the computer route all the signal traces, and get the layout 100% routed. It’s a no-brainer. Anyone can do it. It should take less than a few hours.”
Reflections and Priorities: An Update to I-Connect007 Readers
06/24/2025 | Marcy LaRont, I-Connect007The electronics and manufacturing industry is evolving rapidly—with new technologies, deeper global connections, and a growing drive toward sustainability. To reflect these changes and our place in this dynamic space, we’re refreshing our brand.
Microchip Enhances Digital Signal Controller Lineup with Industry-Leading PWM Resolution and ADC Speed
06/21/2025 | MicrochipEvolving security and functional safety demands, coupled with the growing complexity of real-time embedded applications, are driving designers to seek innovative solutions that deliver greater accuracy, improved reliability and compliance with industry standards.