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Happy's Tech Talk #5: Advanced Boards for Heterogeneous Integration

My Tech Talk #4 was about SAP technologies. I also introduced the IC strategies of heterogeneous integration. But even Karl Dietz’s Tech Talk column wrote about advanced board technologies for IC interconnections many times from 2000 to 2010.^1,2

Introduction
The expansion of IC functionality usually progresses with the shrinking of IC geometries, called “Moore’s Law” after Gordon Moore who first coined the phrase. But now that geometries are below 5 nm, the costs and difficulties are creating a barrier to much further advances. So, the solution seems to be to mix IC die on the same substrate as a system-in-package (SiP) that is now called heterogeneous integration (HI).

Heterogeneous Integration
The constant reduction in semiconductor transistor geometries has created a situation that appears less costly to break up very large-complex dies into smaller dies and combine them with modular dies, now named chiplets, and tiny discretes on an organic substrate using these exceedingly small trace and spaces along with very tiny vias. Three architectures have become the most likely candidates to accomplish this task (Figure 1):

• Multiple IC die on a package substrate using a PCB, glass, or ceramic material
• Silicon or glass interposer between the die and package
• A small, embedded silicon bridge in the package substrate that connects the various die and discretes

Multi-Chip Packages
The current conventional flip-chip is a ball grid array package (Figure 2). The structure is one or two layers of the additive Ajinomoto build-up film (ABF) on a traditional high performance HDI core (1 + 2+ 1). New ABF processes utilize a high-temperature RCC (usually polyimide) to permit higher temperature assembly processes⁵ (Figure 3).

Silicon Interposer
The increasing complexity of HI will add more functionality to these substrates and result in interposer modules (Figure 4) that will contain IC chips of various materials/connections, embedded components, RF/antennas, optical waveguides, and even energy storage.

Embedded Multi-Die Interconnect Bridge
A third architecture has emerged with Intel’s proposal of using small silicon bridges (called EMIB) embedded in the substrate to provide the interconnect density of interposers while using the lower costs of package substrates (Figure 5).

Table 2 and Figure 7 compare the materials frequency performance. Glass used in LCD displays is considered a main candidate to replace silicon.

Challenges for PCB Fabs to Implement IC Packaging
There are around six to eight organic IC substrate fabricators in the world—all in Asia (Japan, Taiwan, Korea, and Malaysia). Currently, none are owned by China but that should change soon. All of these will migrate to making the HI substrates in high volume. If North America or the EU plan to manufacture the new HI substrates, several challenges will need to be overcome:

• Material: ABF or similar films with their specialized vacuum lamination equipment and surface preparations for additive Cu will need to be mastered
• Costs: Labor intensive back-end processes will need to be minimalized or eliminated (this has caused other N.A. IC substrate fabs to close)
• Assembly: Currently, there are no high-volume OSAT semiconductor assemblers in N.A.; these will have to be established
• Customer support: Customer consulting, modeling, and engineering interfaces will need to be added
• Test: Testing HI substrates will be specialized and needed tooling will have to be established
• Co-design: It will have to be determined if the HI substrate fabricator will need to be capable of EDA design and modeling similar to today’s IC packaging and OSAT vendors

The complete list of challenges can be seen in Table 3.

Conclusion

The search for packaging solutions for the emerging heterogeneous integration systems has just begun. Its foundations will be the FCBGA, silicon interposer, and 2.5D packaging solutions in use today, but with more emphasis on lower cost, higher performance, and geographic availability. Figure 8 shows the Intel concept of their EMIB and Foveros technologies to create the high-density solution required for next-generation products.

The best projections for the PCB fabrication industry for the next five years are that the highest growth will be for high-density boards of HDI (6.8%) and chip substrates (9.7%) as seen in Table 4 from the IPC Report, “North American Advanced Packaging Ecosystem Gap Assessment,” available free from the IPC⁸.

References

1. Karl Dietz Tech Talk #187, “Wafer Bumping Technology Choices,” CircuiTree, December 2000.
2. Karl Dietz Tech Talk #173, “Blending IC Fab and Substrate Fab Processes,” CircuiTree, February 2010.
3. “Innovative Panel Plating for Heterogeneous Integration,” by Richard Boulanger, SMTA Pan Pacific Proceedings, Honolulu, Hawaii, 2019.
4. “The New Technology Solutions for Advanced SiP Devices,” by Yongjai Seo, Semiconductor Engineering, October 2021.
5. “Novel Thin Copper Transfer Films for Fine Line Formation on PCB Substrates,” by Hirohisa Narahashi, Transactions of the Japan Institute of Electronics Packaging, Vol. 3, No.1, 2010.
6. IEEE Heterogeneous Integration Roadmap, Chapter 13, HIR 2020 version, pp 2-4.
7. IEEE Heterogeneous Integration Roadmap, Chapter 2, pp 10.
8. “North American Advanced Packaging Ecosystem Gap Assessment,” by Matt Kelly and Jan Vardaman, IPC Report, November 2021, pp 115.

Happy Holden is the author?of?Automation and Advanced Procedures in PCB Fabrication, and?24 Essential Skills for Engineers.?

This column originally appeared in the February 2022 issue of PCB007 Magazine.