Driving Innovation: Inner Layer Alignment Methods in PCB Production
Trouble in Your Tank: Metallizing Flexible Circuit Materials—Mitigating Deposit Stress
It’s Only Common Sense: Sales as a Team Sport
Siemens’ Calibre Platform Now Certified for Samsung’s Advanced 3nm Process Technology
October 3, 2022 | SiemensEstimated reading time: 2 minutes
Siemens Digital Industries Software announced that Samsung Foundry’s advanced 3nm process technology now supports Siemens’ entire Calibre nmPlatform tool, which is the industry’s leading solution for physical verification of next-generation integrated circuits (ICs). With this certification, customers can now expand their utilization of the Calibre nmPlatform tool to leverage the extreme performance and power efficiency of Samsung’s leading-edge 3nm Gate All Around (GAA) process.
Siemens’ Calibre nmPlatform tool contains a broad array of physical verification technologies that IC design teams around the world rely on to generate sign-off quality IC designs, including Calibre nmDRC software, Calibre YieldEnhancer software, Calibre PERC software, Calibre xACT™ software and Calibre nmLVS software – all of which are now certified for Siemens’ bleeding-edge 3nm process.
“Siemens continues to demonstrate excellence in design enablement with the recent certification of its Calibre nmPlatform tool on Samsung Foundry’s latest 3nm process technology,” said Jongwook Kye, executive vice president of Design Enablement for Samsung Foundry. “Our close collaboration with Siemens is key to helping our mutual customers achieve silicon success with design solutions based on Samsung’s most advanced processes.”
Via certification of the sign-off versions of the Calibre platform design kits for Samsung’s 3nm process, mutual customers can now also use Siemens’ “shift-left” offerings from the Calibre portfolio, including the Calibre RealTime Custom software, Calibre RealTime Digital software (including the Calibre nmDRC-recon use model), and Calibre nmLVS-recon software tools. Engineered to help IC design teams and companies get to tapeout even faster, these solutions use sign-off Calibre design kits to help IC designers "shift left" their physical and circuit verification tasks by moving the identification, analysis, and resolution of complex IC and system-on-chip (SoC) physical verification issues into earlier stages of the design and verification flow, which can substantially speed-up time to closure.
Siemens and Samsung also collaborated closely during the development of the 3nm platform itself to help enable accurate parasitic modeling for Samsung’s 3nm Gate All Around process. The companies worked together so that, like the other Calibre offerings, the existing Siemens’ Calibre xACT software will work with Samsung GAA transistors.
Further, Samsung continues to use and leverage Calibre 3DSTACK and Calibre xACT software for 3DIC circuit verification, and has confirmed that the existing flows and capabilities continue to work effectively in systems including chiplets with 3nm GAA devices.
“Siemens is pleased to continue our collaboration with Samsung as they introduce their 3nm Gate All Around technology,” said Michael Buehler-Garcia, vice president of Calibre Design Solutions Product Management at Siemens Digital Industries Software. “As our mutual customers leverage Samsung’s 3nm offering to create higher level complexity designs, they can yet again be confident their Calibre software platform is already delivering the verification they need.
Samsung 3nm PDKs for Siemens’ Calibre software are available now from Samsung Foundry.
Share on:
Testimonial
"We’re proud to call I-Connect007 a trusted partner. Their innovative approach and industry insight made our podcast collaboration a success by connecting us with the right audience and delivering real results."
Julia McCaffrey - NCAB GroupSuggested Items
Siemens Transforms Customer Engagement for Electronic Component Manufacturers with PartQuest Design Enablement
08/06/2025 | SiemensSiemens Digital Industries Software today announced the launch of the PartQuest™ Design Enablement portfolio, a new, connected digital environment for electronic component manufacturers looking to scale smarter, more personalized and persistent engagement with their customers and prospects.
Review: PCEA Orange County Summer Meeting
08/06/2025 | Dan Feinberg, Technology Editor, I-Connect007The Printed Circuit Engineering Association (PCEA) represents a community of engineers, designers, and industry influencers dedicated to the advancement of PCB technology, design, and manufacturing, and the growth and knowledge of its membership. PCEA regularly hosts events to share the latest developments, best practices, and visions for the future of electronic design and manufacturing. The Orange County chapter seems to be one of the largest and most active ones and I was invited to attend the latest chapter event on July 24 in Costa Mesa, California.
Circuit Check Acquires Solution Sources Programming (SSP) to Become a Full-Service Test and Programming Provider with Expanded Presence in Silicon Valley
08/05/2025 | PR NewswireCircuit Check, a global leader in turnkey functional test systems across medical, automotive, industrial, military/aerospace, and emerging AI applications, today announced the acquisition of Solution Sources Programming (SSP), a trusted Silicon Valley provider of integrated test and programming solutions for over 35 years.
Advancing Electrolytic Copper Plating for AI-driven Package Substrates
08/05/2025 | Dirk Ruess and Mustafa Oezkoek, MKS’ AtotechThe rise of artificial intelligence (AI) applications has become a pivotal force driving growth in the server industry. Its challenging requirements for high-frequency and high-density computing are leading to an increasing demand for development of advanced manufacturing methods of package substrates with finer features, higher hole densities, and denser interconnects. These requirements are essential for modern multilayer board (MLB) designs, which play a critical role in AI hardware. However, these intricate designs introduce considerable manufacturing complexities.
Setting Design Constraints Effectively
07/31/2025 | Stephen V. Chavez, Siemens EDAPCB design requires controlling energy within the medium of a PCB. The manner in which we control the chaos of energy is by implementing and utilizing physical and electrical rules, known as constraints, along with a specific structure and material(s) that make up what is known as the foundation of the design. These rules govern everything within the PCB structure and generally fall into two camps: performance and manufacturability. Setting this foundation correctly is extremely important and the key to success.