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ZESTRON to Present on Defluxing Ultra-Fine Pitch Die on CoWs at IPC APEX 2023
December 21, 2022 | ZESTRONEstimated reading time: Less than a minute

ZESTRON, a leading global provider of high-precision cleaning products, services, and training solutions in the electronics manufacturing and semiconductor industries, is pleased to announce that ZESTRON’s Senior Application Engineer, Ravi Parthasarathy will be presenting, “Process Considerations for Defluxing Ultra-Fine Pitch Die on CoWs”, at IPC APEX 2023 taking place in San Diego, California.
CoW (Chip on Wafer) is the next generation of CoS (Chip on Substrate) that first combines the chips to the interposer, adds wafer-level molding, and finally, they are connected to the flip chip (FC) substrate. This technology makes a better physical structure for accommodating very large die and larger overall interposer dimensions.
A continuation from the technical paper presented at APEX 2022 and titled “Defluxing of Copper Pillar Bumped Flip Chips,” this new study concentrates on cleaning under the next level of ultra-fine pitch CoW devices down to less than 25?m bump pitch and bump counts of more than 150K. This study focuses on the impact of wash temperatures and conveyor belt speed utilizing analytical/functional testing, including Visual Inspection, FTIR with color mapping, and SEM/EDX to assess cleanliness.
Suggested Items
RF PCB Design Tips and Tricks
05/08/2025 | Cherie Litson, EPTAC MIT CID/CID+There are many great books, videos, and information online about designing PCBs for RF circuits. A few of my favorite RF sources are Hans Rosenberg, Stephen Chavez, and Rick Hartley, but there are many more. These PCB design engineers have a very good perspective on what it takes to take an RF design from schematic concept to PCB layout.
Trouble in Your Tank: Causes of Plating Voids, Pre-electroless Copper
05/09/2025 | Michael Carano -- Column: Trouble in Your TankIn the business of printed circuit fabrication, yield-reducing and costly defects can easily catch even the most seasoned engineers and production personnel off guard. In this month’s column, I’ll investigate copper plating voids with their genesis in the pre-plating process steps.
Elephantech: For a Greener Tomorrow
04/16/2025 | Marcy LaRont, PCB007 MagazineNobuhiko Okamoto is the global sales and marketing manager for Elephantech Inc., a Japanese startup with a vision to make electronics more sustainable. The company is developing a metal inkjet technology that can print directly on the substrate and then give it a copper thickness by plating. In this interview, he discusses this novel technology's environmental advantages, as well as its potential benefits for the PCB manufacturing and semiconductor packaging segments.
Trouble in Your Tank: Organic Addition Agents in Electrolytic Copper Plating
04/15/2025 | Michael Carano -- Column: Trouble in Your TankThere are numerous factors at play in the science of electroplating or, as most often called, electrolytic plating. One critical element is the use of organic addition agents and their role in copper plating. The function and use of these chemical compounds will be explored in more detail.
IDTechEx Highlights Recyclable Materials for PCBs
04/10/2025 | IDTechExConventional printed circuit board (PCB) manufacturing is wasteful, harmful to the environment and energy intensive. This can be mitigated by the implementation of new recyclable materials and technologies, which have the potential to revolutionize electronics manufacturing.