Siemens Announces Certifications for TSMC’s Latest Processes
April 28, 2023 | SiemensEstimated reading time: 2 minutes
Siemens Digital Industries Software announced at the TSMC 2023 North America Technology Symposium a range of new certifications and collaborations with longtime partner TSMC, resulting in key achievements toward enabling Siemens EDA technologies for the foundry’s latest process technologies.
Calibre platform certified for N3E processes
Siemens’ industry-leading Calibre® nmPlatform tool for integrated circuit (IC) verification sign-off is now fully certified for TSMC’s advanced N3E and N2 processes, including Calibre® nmDRC software, Calibre® YieldEnhancer™ software, Calibre® PERC™ software, Calibre® xACT™ software and Calibre® nmLVS software.
TSMC and Siemens have also collaborated to certify Siemens’ mPower™ analog software for transistor-level electromigration and IR drop (EM/IR) sign-off for TSMC’s N3E process. This achievement allows mutual customers to apply the mPower solutions’ unique EM/IR signoff solution to their next-generation analog designs. Further, TSMC and Siemens are now collaborating to certify mPower™ digital software for TSMC’s N3E process.
“Our long-standing collaboration with Siemens brings innovative design solutions to our mutual customers and can enable success in the fast-moving semiconductor market,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “We look forward to continuing to provide our mutual customers with best-in-class technologies and solutions for optimized performance, power, and area.”
New certifications for Analog FastSPICE platform
Siemens’ Analog FastSPICE platform for circuit verification of nanometer analog, radio frequency (RF), mixed-signal, memory, and custom digital circuits has successfully achieved TSMC certification for the foundry’s advanced N5A, N3E, and N2 processes. Further, as part of the custom design reference flow (CDRF) for TSMC’s N3E and N4P processes, Siemens’ Analog FastSPICE platform now supports TSMC’s Reliability Aware Simulation technology, which addresses IC aging and real-time self-heating effects among other advanced reliability features. TSMC’s N4P CDRF also includes Siemens’ Solido™ Variation Designer software for advanced variation-aware verification at high sigma.
New certification for Siemens’ Tanner software
Siemens has also enhanced its Tanner™ software, which helps customers design and lay out their next-generation analog and mixed-signal ICs. By working in close collaboration with the TSMC team to develop the required functionality, Siemens’ Tanner software is now able to efficiently and successfully tape out a design at TSMC’s 16nm node. This achievement is one of many milestones resulting from Siemens’ ongoing investment to massively transform the Tanner portfolio into an enterprise-ready design environment with the ability to support advanced process nodes. Part of this effort includes Siemens’ close collaboration with TSMC on many initiatives, including the establishment of Tanner software iPDK support for legacy nodes, and emerging support for advanced nodes.
“We are excited that our partnership with TSMC is offering innovative new solutions that enable success for our customers,” said Joe Sawicki, EVP of IC EDA at Siemens Digital Industries Software. “These new certifications and milestones further demonstrate our commitment to driving digital transformation in the semiconductor industry with our longtime foundry partner TSMC.”
Suggested Items
Real Time with… IPC APEX EXPO 2024: Ventec Discusses New Pro-bond Family of Advanced Products
05/01/2024 | Real Time with...IPC APEX EXPOChris Hanson, Ventec's Global Head of IMS Technology, outlines the launch of four pro-bond formulas that deliver an outstanding combination of low dissipation factor (Df) with a dielectric constant (Dk) range to maximize the design window for critical PCB parameters. As Chris points out, Pro-bond is designed for low-loss, high-speed applications, while thermal-bond dissipates heat from a component through the board to a heat sink.
IPC's Vision for Empowering PCB Design Engineers
04/30/2024 | Robert Erickson, IPCAs architects of innovation, printed circuit board designers are tasked with translating increasingly complex concepts into tangible designs that power our modern world. IPC provides the necessary community, standards framework, and education to prepare these pioneers as they explore the boundaries of what’s possible, equipping engineers with the knowledge, skills, and resources required to thrive in an increasingly dynamic field.
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.
Cadence, TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
04/25/2024 | Cadence Design SystemsCadence Design Systems, Inc. and TSMC have extended their longstanding collaboration by announcing a broad range of innovative technology advancements to accelerate design, including developments ranging from 3D-IC and advanced process nodes to design IP and photonics.
Ansys, TSMC Enable a Multiphysics Platform for Optics and Photonics, Addressing Needs of AI, HPC Silicon Systems
04/25/2024 | PRNewswireAnsys announced a collaboration with TSMC on multiphysics software for TSMC's Compact Universal Photonic Engines (COUPE). COUPE is a cutting-edge Silicon Photonics (SiPh) integration system and Co-Packaged Optics platform that mitigates coupling loss while significantly accelerating chip-to-chip and machine-to-machine communication.