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Cadence Continues ‘Left Shift’ of SI Functions
February 29, 2024 | I-Connect007 Editorial TeamEstimated reading time: 8 minutes
At DesignCon, the I-Connect007 Editorial Team met with Brad Griffin, product marketing group director for the System Analysis Group at Cadence Design Systems. Brad walked us through the Sigrity Aurora signal and power integrity tool, which continues the “left-shift” of analysis functionality further ahead in the design cycle. In this interview, Brad explains how this analysis tool enables designers to address SI and PI issues early in the design process, before they become costly errors, and why he believes his late co-worker Dennis Nagel would be proud to see his efforts come to fruition.
Andy Shaughnessy: Brad, I see that Cadence is promoting Sigrity Aurora for Allegro X during the show. Walk us through how this works.
Brad Griffin: Sure. Basically, you have the Allegro X design canvas, and the signal integrity and power integrity engines are underneath. So, when you're pushing and shoving traces around, you can say, “Let's see what the signal or power integrity looks like.” It will give you a red, blue, and green indicator that tells you, “There’s a problem where you have a discontinuity of some kind right here.” Then the designer knows that that’s something he needs to fix. We do the same thing with power integrity.
This is Sigrity technology, signal and power integrity, under Allegro Design canvasses and design set-up. With impedance analysis, you get these tables that tell you what the impedance was as DC changed from 50 ohms to 85. Why did it change? You can click right on that spot on the canvas, and then you say, “Oh, I see. That's a boo-boo there.” What’s nice about impedance and coupling is that you don't need to know anything about SI. It just tells you that the field solver detects a different impedance. With the coupling workflow, it tells you that these things have been running next to each other for a while and we see some significant coupling here. Maybe the problem may not be a problem. But if you're a designer, at least you can say, “Oh, I have an opportunity to spread those traces apart. I’ll do that now.” It's basically giving you hints along the way. Some of the workflows require a little more insight into signal and power integrity, but that can be learned over time. Sigrity Aurora is focused on empowering the non-expert to provide actionable results that can be easily implemented in the design tool.
I know you’ve heard of Symphony, the Cadence technology that allows multiple designers to work on a design simultaneously. Well, this is Symphony-enabled. So, the analysis guy can be looking at the design while the designer is designing, running these analyses, and saying, “I need you to go in and change this.” It's like working on a document in Teams, except you're working on a PCB design. You don't have to understand the science at all. Just look at the picture, and say, “Wow, this doesn't look good at all. Can I open this up some more so those current vectors can get through a little bit easier?”
Kelly Dack: So, the main objective here is that, if you can put some of this analysis functionality in the hands of the design teams early on, you can avoid a lot of problems for the SI engineer later.
Griffin: Your poor, overworked SI engineer will still be around, but instead of 10 iterations back and forth, you may only have two or three iterations. You may need to talk to your department’s SI engineer eventually, but there will be far less for him to fix. That’s good, because your SI engineer is usually buried.
Dack: So, the software has the 3D data graphics that it needs to make the calculations for current carrying capacity, for instance?
Griffin: Yes, absolutely.
Dack: Let’s say I see a problem being highlighted in red, and it's a big neck-down. Can I do something as simple as increase the copper thickness on a layer, and it will reflect that back?
Griffin: Absolutely. If you change the stackup, then all these simulations will reflect that changed stackup. Let’s say I really need to get my SI engineer’s feedback on this, but I know he's really busy, and if I just send him my board file, when will he get to it? Maybe my board file will change before he gets to it. We give you the ability, from this design environment, to send him an S-parameter, because it's much easier for him to open up an S-parameter, maybe hook up a driver receiver and run a simulation, than it is for him to get the design—which may have changed in the meantime.
Shaughnessy: Can designers use Aurora at the schematic level?
Griffin: Sure. Topology extraction allows you to, while on the design canvas, pick a net, and then bring it into an environment like this where you can do “what if” analysis. You can change the length of transmission lines, insert some vias, take vias out, and then ultimately, run your simulation and your waveforms will tell you, if you can do this on the design canvas, whether it would make it better or make it worse. OK, I'm not going to play with this specifically on the canvas; I just want to have my own sort of schematic version of it. Maybe I want to change the driver, or put it on a different layer.
So, this is purely for “what if.” We’ve been doing this for a long time, but what we haven't been doing for a long time is doing it in this environment. This is the same exact environment that we use for our schematic tool. This is system capture. That's what I love about this: This is Allegro Schematic, and the other one is Allegro PCB. All this design and analysis functionality is really tying in very closely.
But it’s “what if.” If you have a component, you know what the driver will look like, and then you can say, “What if I have five inches of trace, or what if I have three vias? What are the impedances at 50 ohms or 55 ohms?” You can do all this “what if” stuff and run the simulations and see how that turns out. Also, in this floor planner environment, you can say, “This bus will be routed like this,” and you just flow it out there. Now you basically have a good estimate of what the lengths of those transmission lines will be. If the board is fully designed, and they find many SI and PI problems, it's really hard to fix. It’s the same as writing a book and coming back and running spell check when you’re ready to publish.
Dack: One thing that we should really discuss is that nobody's an expert in everything.
Griffin: That’s correct. You might be an expert at one thing but not another thing. As a user, you choose what you want to look at. If you don't ever run these workflows, you don't get any feedback. But say I want to check my impedance because I need to feel comfortable with that. I run that workflow and I get these red, blue, and green indicators that give me the impedance information that I need. But no one is an expert at everything.
Dack: How long does it take to learn to use this tool? What’s the learning curve?
Griffin: There is a learning curve here; you can't possibly understand all the workflows on day one. But it's a much different learning curve than your boss telling you, “I want you to become an SI expert.” This tool is manageable, Kelly. When people have two or three years of experience with this, it will just become natural to run SI, PI, return path, and even S-parameter extraction workflows. It will be very empowering. I’ve been at Cadence for 20 years. I came here because I wanted to take chip, package, and board and integrate it with analysis technology; we finally are there, and it’s awesome.
Shaughnessy: Did you lead the development of this?
Griffin: No, I have to give credit to my buddy Dennis Nagel, a Cadence engineer who passed away a few years ago. I’ve always said, “We will bring this to market, make it a success, and we will stamp Dennis Nagel’s name on it.”
Shaughnessy: Dennis was a great guy; he wrote articles for us years ago. Sounds like he’d be happy with what you all have done with this.
Griffin: I chalk it up to Dennis's legacy. The most important thing here is that left-shifting this SI and PI capability leads to a predictable design cycle. You need a predictable design cycle, because if we're supposed to be in manufacturing, and we’re not, that's expensive. You can't miss that date.
Shaughnessy: That’s great. Anything that gives the designers more information up front is a good thing. Thanks for speaking with us, Brad.
Griffin: Thank you all.
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