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Suggested Items

How San Francisco Circuits Achieved CMMC Certification

08/25/2026 | Daniel Porton and Alex Danovich, San Francisco Circuits
When the U.S. Department of Defense began signaling that cybersecurity self-attestation would eventually give way to mandatory third-party certification, San Francisco Circuits decided to get ahead of it. That decision, made in 2019, shaped everything that followed: the systems we implemented, the partners we engaged, and the audit we ultimately passed. This is the story of that process, including what worked, what added complexity, and what we'd tell other EMS companies and defense suppliers that are now facing the same path.

I-Connect007 Editor’s Choice: Five Must-Reads for the Week

08/14/2026 | Marcy LaRont, I-Connect007
Another week has flown by, and it’s time for the must-read articles and news highlights. This week, I’m putting a spotlight on FUJI PCB and FS Quality, through an interview by Dan Beaulieu with President Tianming Liu, and “the rest of the story” from the EIPC Summer Conference technical sessions. I’m also focusing on a new marketing book by Brittany Martin, and there’s rarely a week when we don’t talk about AI, so I also chose Sean Patterson’s most recent practical advice for PCB fabricators. Though the U.S. has placed a “stay” on CMMC Level 2 certification, it’s still coming for you and your business. If you work in the Mil/Aero space in the U.S., check out what Omega EMS has done to accelerate its compliance. Their wisdom may be worth your time.

Omega EMS Advances Toward CMMC Level 2 Certification

08/12/2026 | Nolan Johnson, SMT007 Magazine
In June, Omega EMS announced its intention to achieve CMMC Level 2 before the U.S. Department of Defense’s mandatory November 2026 implementation timeline for organizations handling Controlled Unclassified Information (CUI). We caught up with Omega EMS CEO Chris Alessio to discuss the company’s certification journey, the investment required, and what CMMC means for Omega’s military and aerospace business. Note: The DoD has suspended its November requirement pending a 60-day review.

Advanced Packaging, Materials Characterization, and System Integration: What’s Ahead in the Advanced Electronics Packaging Digest

08/11/2026 | I-Connect007 Editorial Team
The August issue of Advanced Electronics Packaging Digest explores how advanced packaging is reshaping semiconductor innovation through better materials characterization, heterogeneous integration (HI), workforce education, and system-level design. Together, these features examine the technologies and engineering decisions driving the next generation of electronic systems.

DFM Mistakes Designers Make When Moving to ELIC

07/20/2026 | Anaya Vardya, American Standard Circuits
The transition from HDI to every layer interconnect (ELIC) is where the DFM gap between design intent and fabrication reality is most visible. Several common misconceptions appear consistently in the data packages we review at ASC. The most common ELIC design mistake mirrors what we generally see in first-time UHDI builds: using process minimums everywhere because they appear on a capability chart. In ELIC, this is especially consequential. If only one region truly requires aggressive geometry, say, a fine-pitch BGA escape, the rest of the design should preserve margin. Relaxing non-critical areas makes the overall build more manufacturable without sacrificing the dense region that drives the stackup.
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