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Happy’s Tech Talk #27: Integrated Mesh Power System (IMPS) for PCBs

A significant decrease in HDI substrate production cost can be achieved by reducing the number of substrate layers from conventional through-hole multilayers and microvia multilayers of eight, 10, 12, and more to only two layers. Besides reducing direct processing steps, the yield will increase as defect-producing operations are eliminated. The integrated mesh power system (IMPS) was invented in the latter years of MCM-D use for thin-film fabrication. Those geometries fit today into our use of ultra HDI.

A Look at the Benefits
In the late 1990s, thin film multichip modules (MCM-D) were supposed to save the interconnect industry. The fine-line lithography would allow miniaturization with ease. Unfortunately, the four or five metal layers to which integrated circuits were wire bonded proved to be too expensive when compared to printed circuit multilayers (Figure 1a) and the emerging silicon integration on ball grid arrays.

IMPS topology was created to reduce the cost of metal layers on thin-film and ceramic multichip modules. The IMPS topology can reduce the metal layers to only two or three. This results in substantial cost reduction and simplification while not affecting electrical performance.

IMPS Background
The scientists at the High Density Electronics Center (HiDEC) at the University of Arkansas invented IMPS in the mid-1990s1. IMPS allows for low inductance co-planar power and ground distribution, as well as dense, controlled-impedance, low crosstalk signal transmission in only two wiring layers. Figure 1b shows the basic IMPS topology.

The conventional metal wiring topology is to have signals on one metal layer and power and ground on separate metal layers. The resulting usage of these expensive metal layers is quite low. Signal layers may have only 50 to 60% utilization and power/ground layers only half that amount when either the coarse mesh or fine mesh is utilized (Figure 1c and 1d).

They may be made smaller (if signal losses can be tolerated), but the spacing cannot. High-speed, fast rise time signals are sensitive to crosstalk, so the signals still must be separated. IMPS uses that separation to route power and ground. To prevent current starvation at devices, an adjacent metal layer running orthogonally is connected by buried vias at each junction where the two layers cross. This layer-pair topology is an “interconnected mesh” that can thus provide all the power/ground connections without voltage loss and connect the signal for these devices.

Electrical Performance
Power distribution impedance was measured with both an HP 8510 network analyzer and an HP 4291A impedance analyzer over a range of 45 MHz to 1 GHz². Figure 2 shows the measured impedance for several substrates with combinations of decoupling capacitance. The results indicated there were minor differences between the IMPS power distribution structure and one using solid planes. Any planar effects were reported to be masked by attachment or wirebonding impedances and by the number and type of capacitors used. The transmission lines are planar waveguides.

IMPS Design
IMPS was developed in the late 1990s for MCM-D design using thin film metallization on liquid dielectrics. Fortunately, PCB technologies have improved in the last 30 years such that ultra HDI technologies can now achieve these thin-film geometries. The various SAP metallizations on polyimide film or ABF organic films can be employed, including the use of metal-backed thermal laminate. The design process is shown in Figure 3.

The architecture is based on the current use of a power mesh in integrated circuit design (Figure 3a). But instead of the single metal use, IMPS employs two metals and adjacent layers, connected by vias to form the mesh (Figure 3b). Figure 3b is the ground mesh, while Figure 3c shows the power mesh. The two are merged with the open area used of X-Y routings (Figure 3d).

Figure 4 illustrates a BGA example of IMPS for a BGA requiring two different voltage rails of VCC and VDD all on two-metal layers.

High-Density MCM-BGA Application
In 1996, HiDEC, using flexible film and Tape BGA (TBGA) technology along with microvias and the IMPS topology, was able to create an MCM-L with only two metal layers instead of the conventional four metal layers of an MCM-D^3,4. This test vehicle puts two IMPS metal layers, which provide signal wiring and power distribution, on the two sides of a Kapton® film. One side contains mounting pads to which the dies are wire bonded and discretes are soldered. This side is encapsulated. The other side has the lands in a ball grid array pattern. A part of the IMPS artwork is shown in Figure 4.

The test vehicle was built on 2-mil Sheldahl an adhesiveless polyimide film called ViaThin™5. The basic design rules are 50 µm lines and spaces, 150 µm via target lands over 25 mm laser-drilled vias. The IMPS mesh consisted of 200 µm lines and 50 µm spaces, with the lines offset from the via row or column centers. Wirebond pads consisted of 200 µm x 350 µm rectangles on both metal layers, tied together with two vias.

The test vehicle showed conclusively that the IMPS topology could be applied to MCM-Ls and BGA substrates without multi-layering. Figure 5 is another closeup of the IMPS topology in an MCM-L.

Summary
The new microvia topologies, IMPS, have demonstrated the application to simplifying complex multilayer, SLPC, and interposers. IMPS can reduce the structure to a two-metal interconnect. These results show that these topologies have the capacity to positively impact how electronic products are packaged and interconnected.

References

1. “Theory and Experimental Conformation of the Interconnected Mesh Power System (IMPS) MCM Topology,” by L.W. Schaper, S. Ang, M. Ahmad, and Yee L. Low, Journal of the International Society for Hybrid Microelectronics, Vol. 18, No. 2, 1995.
2. “Power Distribution System of the Interconnected Mesh Power System (IMPS),” by L.W. Schaper, S. Ang, Yee L. Low, and Danny R. Oldham, ICEMCM, Trans. On Components, Packaging and Manufacturing Technology, February 1995.
3. “Design of the Interconnected Mesh Power System (IMPS) MCM Topology,” by L.W. Schaper, S. Ang, Proceedings of the ICE on Multichip Modules, April 1996.
4. “Comparison of the Interconnected Mesh Power System (IMPS) and Buried Stripline Interconnect Topologies,” by L.W. Schaper and Carl V. Reynolds, Proceedings of the ICE on Multichip Modules, April 1994.
5. “2-Metal Layer Taper: The Next Generation in BGA and CSP Substrates,” by G.R. Weihe, The Board Authority, Volume 2, April 2000.

Happy Holden has worked in printed circuit technology since 1970 with Hewlett-Packard, NanYa Westwood, Merix, Foxconn, and Gentex. He is currently a contributing technical editor with I-Connect007, and the author of Automation and Advanced Procedures in PCB Fabrication, and 24 Essential Skills for Engineers.

This column originally appeared in the March 2024 issue of PCB007 Magazine.