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Advancing Electrolytic Copper Plating for AI-driven Package Substrates

08/05/2025 | Dirk Ruess and Mustafa Oezkoek, MKS’ Atotech
The rise of artificial intelligence (AI) applications has become a pivotal force driving growth in the server industry. Its challenging requirements for high-frequency and high-density computing are leading to an increasing demand for development of advanced manufacturing methods of package substrates with finer features, higher hole densities, and denser interconnects. These requirements are essential for modern multilayer board (MLB) designs, which play a critical role in AI hardware. However, these intricate designs introduce considerable manufacturing complexities.

Advint and Sayron Bring Advanced Rectifier Solutions to High-Reliability PCB Manufacturers

08/01/2025 | Advint Incorporated
Advint Incorporated has partnered with Sayron, a leading global rectifier manufacturer, to supply cutting-edge IGBT-based DC rectifiers to high-performance PCB manufacturers across North America and beyond. Sayron’s precision-engineered rectifiers align with the stringent requirements of advanced PCB processes.

Meet the Author: Beth Turner Explores Encapsulating Sustainability for Electronics

07/28/2025 | I-Connect007
In a special Meet the Author edition of On the Line with…, host Nolan Johnson welcomes Beth Turner, senior technical manager at MacDermid Alpha Electronics Solutions. Beth is the author of The Printed Circuit Assembler’s Guide to… Encapsulating Sustainability for Electronics.

Digital Twin Concept in Copper Electroplating Process Performance

07/11/2025 | Aga Franczak, Robrecht Belis, Elsyca N.V.
PCB manufacturing involves transforming a design into a physical board while meeting specific requirements. Understanding these design specifications is crucial, as they directly impact the PCB's fabrication process, performance, and yield rate. One key design specification is copper thieving—the addition of “dummy” pads across the surface that are plated along with the features designed on the outer layers. The purpose of the process is to provide a uniform distribution of copper across the outer layers to make the plating current density and plating in the holes more uniform.

Happy’s Tech Talk #40: Factors in PTH Reliability—Hole Voids

07/09/2025 | Happy Holden -- Column: Happy’s Tech Talk
When we consider via reliability, the major contributing factors are typically processing deviations. These can be subtle and not always visible. One particularly insightful column was by Mike Carano, “Causes of Plating Voids, Pre-electroless Copper,” where he outlined some of the possible causes of hole defects for both plated through-hole (PTH) and blind vias.
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