Demand from AMD and NVIDIA Drives FOPLP Development, Mass Production Expected in 2027–2028
July 5, 2024 | TrendForceEstimated reading time: 2 minutes
In 2016, TSMC developed and named its InFO FOWLP technology, and applied it to the A10 processor used in the iPhone 7. TrendForce points out that since then, OSAT providers have been striving to develop FOWLP and FOPLP technologies to offer more cost-effective packaging solutions.
Starting in the second quarter, chip companies like AMD have actively engaged with TSMC and OSAT providers to explore the use of FOPLP technology for chip packaging and helping drive industry interest in FOPLP. TrendForce observes that there are three main models for introducing FOPLP packaging technology: Firstly, OSAT providers transitioning from traditional methods of consumer IC packaging to FOPLP. Secondly, foundries and OSAT providers packaging AI GPUs that are transitioning 2.5D packaging from wafer level to panel level. Thirdly, panel makers who are packaging consumer ICs.
Examining cases of OSAT providers transitioning from traditional packaging to FOPLP for consumer ICs, AMD has been in in discussion with PTI and ASE for PC CPU products, while Qualcomm has been in talks with ASE for PMIC products. Currently, due to FOPLP’s linewidth and spacing not yet matching the level of FOWLP, FOPLP applications are temporarily limited to mature processes and cost-sensitive products like PMICs. Mainstream consumer IC products will adopt FOPLP once the technology matures.
For foundries and OSAT providers transitioning AI GPU packaging from wafer level to panel level 2.5D, AMD and NVIDIA have been discussing with TSMC and SPIL for AI GPU products, focusing on enlarging the chip packaging size under the existing 2.5D model. However, due to technical challenges, foundries and OSAT providers are still evaluating this transition.
NXP and STMicroelectronics, representing the development direction of panel makers packaging consumer ICs, are currently undergoing talks with Innolux to package PMIC products.
Several points stand out regarding the impact of FOPLP technology on the packaging and testing industry: Firstly, OSAT providers can offer low-cost packaging solutions, increasing their market share in existing consumer ICs and even entering multi-chip packaging and heterogeneous integration businesses. Secondly, panel makers can enter the semiconductor packaging business. Thirdly, foundries and OSAT providers can reduce the cost structure of 2.5D packaging models, potentially expanding 2.5D packaging services from the AI GPU market to the consumer IC market. Lastly, GPU providers can increase the packaging size of AI GPUs.
TrendForce believes that the advantages and disadvantages of FOPLP—along with adoption incentives and challenges—coexist. The main advantages are lower unit costs and larger packaging sizes, but the technology and equipment systems still need development, and the commercialization process is highly uncertain. The estimated mass production timeline for FOPLP packaging technology in consumer IC and AI GPU applications is the second half of 2024 to 2026 and 2027–28, respectively.
Suggested Items
IDC: Semiconductor Foundry 2.0 Market is Entering the Growth Phase from Recovery with 11% YoY Growth in 2025
03/24/2025 | IDCAccording to IDC ’s Worldwide Semiconductor Supply Chain Tracking Intelligence latest report, the global semiconductor market, following a recovery in 2024, is expected to experience steady growth in 2025.
Zuken Joins IBM Research AI Hardware Center to Develop Next-Generation AI Hardware Solutions
03/24/2025 | ZukenZuken Inc. announced an agreement with IBM to join the IBM Research AI Hardware Center as a commercial member. The IBM Research AI Hardware Center, a global research hub headquartered at the Albany NanoTech Complex in Albany, NY, aims to develop next-generation chips and systems, including advanced semiconductor packaging, that support the processing power and unprecedented speed that AI requires.
IMAPS and DPC: 21 Years of Elevating Technical Knowledge
03/13/2025 | Marcy LaRont, I-Connect007The IMAPS 21st Device Packaging Conference (DPC) may have taken place at a conference center located down an idyllic desert road showcasing the best of what native Arizona has to offer, but the topics at this conference were anything but laid-back. This important platform for professionals in microelectronics and advanced packaging set the stage for a technology in high demand. Brian Schieman, IMAPS executive director, says the show was organized to demonstrate their commitment to addressing current technological trends and with significant energy directed toward fostering connections within the supply chain.
I-Connect007 Editor’s Choice: Five Must-Reads for the Week
03/07/2025 | Andy Shaughnessy, I-Connect007It’s been a busy week. My must-reads include articles and news items on global trends and challenges, groundbreaking technology, the hunt for the elusive young PCB designers, and some personnel changes. We also have a great column on the value of following up and keeping promises. We’re all guilty of “dropping the ball” from time to time, aren’t we?
IMAPS’ Annual Conference Opener in Phoenix ‘Blew My Mind’
03/05/2025 | Marcy LaRont, I-Connect007It was a cool and sunny morning as I headed out to the IMAPS Device Packaging Conference 2025 in Arizona early Tuesday, which featured two compelling keynote speakers, and a day chocked full of technical sessions. IMAPS 2025 also hosted a sold-out exhibit hall with 65 exhibitors from IBM and Heraeus to Cadence and KYZEN, to name just a few. The technology and packaging discussions at this conference blew my mind last year, and it is clear this year would be no different.