OKI Develops Tiling Crystal Film Bonding (CFB) Technology for Heterogeneous Integration of Optical Semiconductors onto 300 mm Silicon Wafers
August 15, 2025 | BUSINESS WIREEstimated reading time: 3 minutes
OKI has successfully developed Tiling crystal film bonding technology using its proprietary CFB technology. This technology makes possible the heterogeneous integration of small-diameter optical semiconductor wafers onto 300 mm silicon wafers, heretofore not possible due to wafer size restrictions, and will contribute to the advancement of rapidly growing photonics-electronics convergence technology. OKI aims to achieve early commercialization through collaboration with partner companies and universities.
Rapid advances in artificial intelligence (AI) in recent years has fueled growing demand for data centers, making it a serious social issue to suppress increases in power consumption while expanding data processing capabilities. One solution to such a challenge currently drawing attention is technologies that achieve high-density, high-speed transmission, and low power consumption, applying photonics-electronics convergence technology that combines electronic and optical circuits. In particular, the heterogeneous integration of optical semiconductors onto silicon wafers is expected to improve performance still further by enabling the integration of silicon photonics with optical semiconductors.
Nevertheless, heterogeneous integration presents various technical challenges. For example, while silicon photonics use large-diameter 200 mm (8-inch) or 300 mm (12-inch) silicon wafers, optical semiconductor wafers such as InP (indium phosphide) wafers are typically smaller 50 mm (2-inch) to 100 mm (4-inch) compound semiconductor wafers due to the difficulty of achieving epitaxial growth. Additionally, silicon optical waveguides require nanoscale roughness control, which in turn requires heterogeneous integration processes that avoid causing damage.
The Tiling CFB technology developed by OKI overcomes this disparity in wafer sizes and allows heterogeneous integration without causing damage. The technology allows for 52 repeated tiling operations over the entire surface of a 300 mm silicon wafer using a single 2-inch InP wafer, enabling efficient use of InP-based materials. The InP wafer can be reused as is after transfer to allow material recycling and reuse, helping reduce the environmental burden. Placement accuracy is approximately ±1 μm, with an angular accuracy of ±0.005°. This high accuracy, when combined with OKI’s proprietary 3D intersecting waveguide (Note 4) silicon photonics technology, realizes high-efficiency optical coupling between optical semiconductors and silicon waveguides.
In a demonstration, a sacrificial layer and InP-based Crystal Films functioning as optical semiconductors were epitaxially grown on a 2-inch InP wafer, then separated into individual elements. A protective structure to prevent chemical attack when etching the sacrificial layer and a support structure for batch transfer were formed on each element. This enabled the InP-based Crystal Films to be successfully batch-transferred to an intermediate transfer substrate without erosion. Batch transfer to an intermediate transfer substrate is carried out to protect the silicon wafer from damage during the subsequent removal process, as removing the protective structure and support structure on the intermediate transfer substrate prevents damage to the silicon wafer during the removal process. The unique design of the intermediate transfer substrate ensures that the InP-based Crystal Films do not peel off, maintain adhesion during the process of removing the protective structure and support structure, and are easily transferred during the transfer process.
Furthermore, by repeatedly transferring Crystal Films from the intermediate transfer substrate using a CFB stamp, OKI has established Tiling CFB technology that enables tiling over the entire surface of a 300 mm silicon wafer. The CFB stamp has a structure capable of selectively transferring only the Crystal Films required, and repeated transfer enables efficient tiling. The capacity to repeatedly transfer lower-density arrays of Crystal Films required for the device from a high-density array of Crystal Films arranged on the intermediate transfer substrate allows effective use of materials without waste. Measuring 30 mm × 30 mm, the CFB stamp used in this demonstration completed 52 transfers onto the entire surface of a 300 mm silicon wafer in approximately 10 minutes, sufficient for commercial production.
This demonstration proved the feasibility of Tiling CFB technology in the transfer from 2-inch wafers to 300 mm silicon wafers. The technology can also be adapted as necessary to allow use with 3- or 4-inch InP wafers and 200 mm silicon wafers. Since it can also be applied with existing optical semiconductor products, it will help improve performance by permitting transfer to high heat-dissipation substrates and productivity by allowing use of larger wafer sizes.
Tiling CFB technology will also contribute to the advancement of photonics-electronics convergence technology and reduced environmental burden. OKI plans to strengthen collaboration with device manufacturers to achieve early commercialization of the technology.
Testimonial
"We’re proud to call I-Connect007 a trusted partner. Their innovative approach and industry insight made our podcast collaboration a success by connecting us with the right audience and delivering real results."
Julia McCaffrey - NCAB GroupSuggested Items
MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout
08/22/2025 | Cadence Design SystemsMorgan State University (MSU) recently received an Apple Innovation Grant, designed to support engineering schools as they develop their silicon and hardware technologies. The New Silicon Initiative (NSI) is designed to inspire and prepare students for careers in hardware engineering, computer architecture, and silicon chip design.
izmomicro Achieves Breakthrough in Silicon Photonics Packaging, Establishing India's Leadership in Advanced Semiconductor Integration
08/21/2025 | PRNewswireizmomicro, a specialized division of izmo Ltd., announced a major milestone in silicon photonics packaging, underscoring its role as a pioneer in India's semiconductor ecosystem and advancing the country's position in the global race toward next-generation data and AI infrastructure.
iDEAL Signs Technology Partner Agreement for SuperQ MOSFETs with Power System Specialist Richardson Electronics, Ltd.
08/01/2025 | PR NewswireiDEAL Semiconductor, a fabless power semiconductor company focused on delivering breakthrough efficiencies, has announced it will partner with Power and RF specialist, Richardson Electronics.
Teramount Raises $50M to Address Growing Demand for AI Infrastructure Optical Connectivity
07/31/2025 | PRNewswireTeramount, the leader in scalable fiber-to-chip interconnect solutions for AI, data centers and advanced computing, today announced it has raised $50 million in financing led by new investor Koch Disruptive Technologies (KDT). Existing investors Grove Ventures and several new strategic investors, including AMD Ventures, Hitachi Ventures, Samsung Catalyst Fund and Wistron, joined the round.
SEMI Reports Worldwide Silicon Wafer Shipments Increase 10% Year-on-Year in Q2 2025
07/29/2025 | SEMIThe SEMI Silicon Manufacturers Group (SMG) reported, in its quarterly analysis of the silicon wafer industry, that worldwide silicon wafer shipments increased 9.6% year-on-year to 3,327 million square inches (MSI) from the 3,035 MSI recorded during the same quarter of 2024.