AI infrastructure is pushing PCB performance into new territory. As data rates move from 56 Gbps to 112, 224, 337 Gbps and beyond, the challenge isn't simply building more boards to support growing computing demand. Those boards also have to carry faster signals with less loss, often across increasingly complex, high-layer-count constructions. That puts new pressure on one of the most fundamental parts of the PCB: its materials.
Low loss laminates are progressing from M7 and M8 toward M8.5 and M9-class materials, while extremely demanding signal paths are beginning to introduce modified PTFE. But this isn't a simple progression in which one material replaces another. Instead, the AI server PCB is evolving toward a hybrid construction that uses different materials where their particular electrical and mechanical properties are needed.
Understanding that evolution starts with the factor driving it: signal speed.
Signal Speed Drives the Material Evolution
The most important change is not the physical size of the server PCB, but the speed of the electrical signal traveling through it. As data rates progress, insertion loss and signal attenuation become difficult to control. This means that the substrate material also has to evolve.
Panasonic created the M6, M7, and M8 designations, which have become widely used in the industry as shorthand for generations of low loss CCL. As performance requirements increase, however, CCL has become a critical component for performance of the high speed interconnect.
What Changes From M7 to M9
The progression from M7 to M9 represents material capability rather than a simple replacement chain. M7 supported earlier high speed AI/server designs, while M8 moved into the lower loss requirements of today’s high performance AI infrastructure. M8.5 pushes loss still lower and places greater importance of HVLP copper, while M9 represents the highest-performance conventional CCL systems, combining very low loss materials with advanced reinforcement and copper foil.
But moving from M7 to M9 involves more than improving the resin system. M9-class materials may combine very low loss resins, advanced glass reinforcement, ultra low profile copper foil, and functional fillers. The specific chemistry can vary by supplier and formulation, which means the M-number is better understood as a performance class than a specification for a particular resin system.
Copper becomes important as well. At very high frequencies, conductor surface roughness contributes to signal loss through the skin effect, increasing the importance of HVLP copper as data rates rise. PCB performance therefore depends on the complete material system: resin, reinforcement, copper foil and surface roughness, along with PCB processing and stackup design.
Where Modified PTFE Fits
As signal speeds increase further, some signal paths may require even lower dielectric loss than advanced M9 systems can practically provide, and this is where we discuss modified PTFE. Representative values reported for modified PTFE include Dk of approximately 2.1–2.4 and Df as low as 0.0005, compared with approximately Dk 3.1 and Df 0.002 for the M9 systems discussed here. These values are representative rather than universal specifications.
PTFE laminates have been available for many years, but incorporating very thin PTFE-based layers into complex, high layer count PCBs presents challenges with adhesion, dimensional stability, lamination, registration, drilling, and high-volume production. Composite PTFE/thermoset systems offer one practical approach for multilayer constructions.
That does not mean PTFE will replace M9. Instead, the two materials can serve different purposes within the same PCB. In a 70-plus-layer backplane, for example, M9 can remain the principal structural material while modified PTFE is used selectively for perhaps six to eight critical high-speed signal layers. The result is a hybrid construction that leverages PTFE's lower dielectric loss without sacrificing the mechanical strength, dimensional stability, and manufacturing maturity of M9.
The challenge, as always, is manufacturability. Modifications such as fillers can improve rigidity and adhesion while retaining very low dielectric loss, but the specific results depend on the formulation. The electrical advantages of PTFE may be clear; integrating it reliably into increasingly complex multilayer constructions remains the harder part.
The Challenge of Building the Board
As materials and constructions become more advanced, electrical performance is only part of the equation. At 70–80 layers or more, registration, process control, drilling, lamination, and manufacturing yield become increasingly important.
Some of the same materials that improve electrical performance can also make the PCB more difficult to manufacture. Hard quartz-type reinforcement, for example, can improve electrical and dimensional performance while reducing drill life and increasing tooling consumption. Hybrid constructions add another level of complexity as fabricators work to maintain adhesion, registration, and dimensional stability across dissimilar materials.
Material availability presents another challenge. A new material must typically be validated by the CCL manufacturer, processed and reliability-tested by the PCB manufacturer, and ultimately qualified by the end customer. Depending on the material and application, that process can take one to two years. Adding CCL options, therefore, does not necessarily mean adding qualified AI-server material capacity.
As AI-server boards become more complex, the best-performing material will not necessarily be the easiest one to manufacture. Success will depend on finding the balance between electrical performance, material capability, process control, and manufacturability.
What Comes Next
AI infrastructure is changing the value equation for the PCB. The industry is not simply producing more boards but boards with higher layer counts, faster signal speeds, lower-loss materials, smoother copper, and tighter manufacturing requirements. As a result, the PCB is becoming a more critical part of the AI computing architecture.
The next challenge will come as architectures move beyond 400 Gbps. At those speeds, the complete signal path—from chip and package through the connector, PCB, backplane, and switch—must be considered as one electrical system. Future CCL development will likely focus on even lower Df, controlled Dk, ultra-low-profile copper, improved thermal and dimensional stability, mechanical reliability, and better adhesion between dissimilar materials, all while maintaining manufacturability at very high layer counts.
The progression from M7 to M9, therefore, does not end with one material replacing another. M8 and M8.5 will continue to serve important applications, while M9 moves into the highest-performance conventional CCL designs. Modified PTFE can address selected signal layers where even lower dielectric loss is required.
The future of the AI-server PCB will likely be hybrid rather than monolithic. M9 can provide the structural backbone, modified PTFE can handle the most demanding signal layers, HVLP copper can help control conductor loss, and advanced fillers and reinforcement can provide the necessary mechanical, thermal, and dimensional stability. As signal speeds continue to rise, the challenge will be to bring all those elements together in a PCB that can be manufactured reliably and at scale.
Manfred Huschka is founder and managing director of Manfred Huschka Management Consulting.
