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Trouble in Your Tank: Electroless Copper and D-Sep

In past columns, I presented information about the different types of ICD interconnect defect and its root causes. One key defect that was not discussed was the infamous D-sep. What exactly is D-sep? We will explore this issue and provide several suggestions for process improvement so that you don’t experience D-sep on your expensive, high-reliability printed circuit boards.

Description of the Defect

First, D-sep is a separation of the electroless copper deposit from the post interconnect. Okay, you say! But isn’t that a definition of an ICD? In a way, yes. However, D-sep occurs without a thermal excursion. Let’s list a few other considerations when discussing D-sep:

• An interconnect separation without any thermal stress;
• Stress in the electroless causes it to separate from the interconnect forming a D shape;
• Separation can cover the width of the interlayer or it can cover only a small part of it;
• Occurs most on 1 oz. layers;
• Occurs more often in center of hole;
• Generally occurs more in center of the plating rack (basket); and
• If all other factors are kept constant in the desmear and electroless line, panels with positive etch back may have D-sep when normal desmear will not.

Read the full article here.

Editor's Note: This article originally appeared in the September 2013 issue of The PCB Magazine.