HDPUG Demonstrates Benefits of Cooperative R&D

Estimated reading time: 17 minutes

Discussing industrialisation targets, Weinhold referred to the EU-funded HERMES project, which had resulted in successful product development, with the benefits of PCB technology modified to be a fully-functional means of cost-effective chip packaging, and the chip-in-polymer process had been an industrialised outcome. In automotive electronics, the biggest growth area was anti-collision radar, and KRAFAS was a cost-optimised sensor for 77GHz active driver assistance system which had been an outcome of another funded project. Now that new design software capability was available, embedding components in PCBs had great potential to enable innovative mechatronic solutions.

The afternoon session began with Stephanie Moran of Oracle reporting progress in the Smooth Copper Signal Integrity project, in its definition phase and proceeding into implementation. "We spend a lot of money on smooth copper foil, and then roughen it up for bonding," she noted. Signal integrity as measured by insertion loss was a critical consideration at higher frequency, and the surface roughness of copper foil was a major factor. It had been observed that inner-layer bonding treatments could contribute up to a 50% change in loss performance. The project objective was to evaluate the effects of adhesion promoters when applied to initially smooth copper, to electrically measure the insertion loss of commonly used cleaning and adhesion-promoting treatments, and to measure the copper surface roughness before and after each treatment. A six-layer test vehicle was being designed, with four ground layers and two internal signal layers, built on Megtron 6 with ½oz HLVP copper. The chemical bonding treatment would be the only variable. The test vehicle would have coupons for signal integrity measurement in the 1-20GHz range and thermal shock testing. Copper surface roughness would be measured by white light interferometry and laser scanning confocal microscope techniques. Six proprietary adhesion promotors had been selected for evaluation. The results would lead to a better understanding of best and worst case scenarios for modelling purposes and increase awareness of poor treatment choices for smooth copper in high speed applications.

HDPUG facilitator Larry Marcanti introduced Phase 2 of the Printed Wiring Board Environmental Life Cycle Analysis project, and was joined by project leader Erkko Helminen from TTM Technologies calling-in. The project recognised that for many consumer electronic products, the greenhouse gas emissions associated with production had a significant impact on the overall lifetime emissions of the product and there was a clear and urgent need for a greenhouse gas analysis tool for PWB fabrication which would take into account design and construction details, how and where the PWBs were made and how efficient the process was.

Phase 1 of the project had resulted in an Excel-based tool to calculate the amount of greenhouse gas emissions and water usage associated with the fabrication of PWBs, based on actual energy and water consumption data from a volume manufacturing facility. The tool differentiated between various designs and constructions, and factored-in the impact of different power generation techniques across different geographical regions. It also included emissions associated with production of process chemicals and raw materials.

Phase 2 of the project aimed to develop a more flexible and more representative calculation tool with enhanced accuracy and reduced uncertainty, with additional capability to support emerging PWB technologies, and compatibility with any fabrication facility. There was a need to raise industry awareness of the project and engage with additional participants to develop ongoing tool maintenance and upgrade strategies.

Neil Chamberlain from Polar Instruments described the objectives of the High Frequency Flex Project, originally proposed at the HDPUG autumn meeting in Canada and now in the idea phase. The aim was to characterise the effects of design features, material choices and operating environments on signal integrity for flexible and flexi-rigid printed circuit boards operating at high-end digital transmission frequencies. The project specifics had yet to be defined but would likely involve the design, fabrication and electrical performance analysis of FPC test vehicles. An idea-phase team had been formed and initial discussions on four areas of concern had been completed. The current objective of the team was to build a test vehicle to evaluate how different cross-hatch designs affect impedance and insertion and return loss parameters, and the project would shortly move into definition phase. It was still open to new participants and was presently seeking project resources.

Fisher presented an update on the Future HDI project on behalf of Ivan Straznicky from Curtiss-Wright. The project was at the definition stage and recognised that BGA pitch continued moving steadily towards 0.5mm and 0.4mm. Consumer electronics were using any-layer-via HDI PCBs to support very fine pitch BGAs with large arrays. Although these were typically too thin for telecom/server and aerospace/defence applications, data transmission speeds were trending towards the 100GHz level, and back-drilling of through-hole vias was becoming common. A test vehicle had been designed featuring two any-layer outer sub-stack constructions with sintered copper paste vias, built over a conventional multilayer core with offset vias. Layers 1/2 and n/n-1 were plated copper, not sintered paste, and the overall construction had plated-through holes for press-fit connectors. The production sequence would involve a maximum of four laminations and two plating steps.

This test vehicle would serve as a development platform for PCB fabricators, and enable the determination of the current carrying capability of stacked sintered copper-paste vias, their lead-free survivability and IST thermal cycle reliability, and also their susceptibility to CAF. It would also allow thermal ageing and CTE mismatch effects to be studied, and electrical performance related to material stability. The test vehicle would be manufactured by multiple fabricators – six had already signed up – each choosing their own preferred methods and materials, in a 24" x 18" panel size with coupons for IST and delamination, current carrying capability, CAF, high-strain part-assembly daisy chain, accelerated thermal cycling and impedance. The design team was at the stage of finalising the details of the test vehicle, continuing the resource definition and commitment, and creating the project plan. The design was scheduled to be ready for fabricator review by end of June 2015, with fabrication completed by end of November and samples ready for testing mid-December.

Oracle's Moran returned to present the update of Phase 2 of the High Frequency Test Methods project on behalf of Karl Sauter from Oracle. It was known that some high frequency test methods, in the frequency range of 1GHz to 20GHz, measured significantly different Dk and especially Df values depending upon the moisture content of the laminate material being tested. Phase 1 of the project showed strong Dk and Df data correlations between high frequency test methods that were of the same type. However, differences in moisture content were found to contribute up to a 20 percent difference in the measured Df values of certain laminates.

Phase 2 proposed to evaluate the effect of moisture on each of the laminate material high frequency Dk and Df test methods, with the exception of equivalent bandwidth. The lower-loss laminate materials selected for testing would be those known to absorb significant amounts of moisture, but without any fillers capable of releasing moisture into the resin system during thermal excursions or at higher temperatures. Measurement of the dielectric parameters presented no problems, and the same techniques would be used as in Phase 1. The biggest challenge was the accurate measurement of small weight changes with a microbalance.

Marcanti returned to present the Harsh Use Environment Alloy Evaluation project, presently at the idea stage. The project proposed to evaluate lead free solders to determine their suitability for harsher environmental and use conditions such as transportation, and defence applications, where the requirement could not be met with SAC alloys. Several calls had been made to discuss the proposal, and there was potential to collaborate with iNEMI and AREA consortium. The team had developed an interest matrix to define of the scope of the work, a series of solder alloys had been identified and several tools and test vehicles were already available for the evaluation. It remained to finalise the alloy list, testing protocol and commitments for test profiles and testing resources, and to draft the project plan in readiness for seeking board approval to proceed to implementation.Page 3 of 4

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