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December 22, 2015 | Yole DéveloppementEstimated reading time: 3 minutes
For many years now, the semiconductor industry development has been governed by the Moore’s law and the increasing demand for higher performance and lower manufacturing costs. Under this context, the “More than Moore” company, Yole Développement (Yole) has identified a strong interest for panel packages technologies. “At Yole, we saw a growing enthusiasm for panel packages solutions dedicated to a selection of advanced packaging platforms,”asserts Amandine Pizzagalli, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing at Yole. And she adds: “The panel packages market is a competitive market which is attracting lot of new entrants compared to the existing advanced packaging market segments”.
Under the new advanced packaging analysis entitled “Status of Panel-Level Packaging & Manufacturing” released by Yole last November, the market research and strategy consulting company estimates, the panel packaging industry will reach US$ 109 million by 2017, with a market value of US$ 405 million by 2020.
The aim of Yole’s report is to provide a comprehensive overview of the panel packages technologies available right now and in-development. The analysts detailed in this report, panel packages solutions for the following advanced packaging platforms: FOWLP panel, embedded die, hybrid interposer and interposer (silicon, glass and organic)… For each segment, Yole’s team describes the commercial status, the market adoption and the key related applications. Analysts also identified the players for each technology and their market positioning all along the supply chain. They propose a comprehensive description of the competitive landscape as well as related market metrics.
For more than four decades, the semiconductor industry has rigorously followed Moore’s Law in scaling down CMOS technologies. However, a huge investment in new lithography solutions is required to achieve advanced nodes in a range of 20 nm. Although some packaging platforms processed on wafer, i.e. silicon interposer, exhibit good performance, high cost is still the main obstacle that limits its adoption for high-volume manufacturing.
“The demand for lower cost with higher performance has driven the semiconductor industry to develop innovative solutions,” says Santosh Kumar, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing at Yole. And he explains: “One new approach to reducing overall cost is to switch from wafer to a larger-size panel format. Indeed, the panel infrastructure has attracted considerable interest from the semiconductor industry and is certainly a promising market due to its cost advantages and economy of scale benefits.” Panel-level manufacturing has the potential to leverage the knowledge and infrastructure of WLP and the PCB /Flat-Panel Display/Photovoltaic industries.
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