Dan’s Biz Bookshelf: ‘Building a Story Brand 2.0’
It’s Only Common Sense: Why Should They Take Your Call?
When you shine a light on a conducting surface like silicon or graphene, that light jump-starts certain electrons into high-energy states and kicks off a cascade of interactions that happens faster than the blink of an eye. Within just a few femtoseconds — a thousand trillionth of a second — these energized electrons can scatter among other electrons like balls on a billiard table, quickly dissipating energy in an ultrafast process known as thermalization.
Now physicists at MIT have come up with a way to manipulate electrons in graphene within the first few femtoseconds of photo-excitation. With their technique, the researchers can redirect these high-energy electrons before they interact with other electrons in the material.
The team’s ultrafast control of high-energy electrons may ultimately lead to more efficient photovoltaic and energy-harvesting devices, which capture photo-excited electrons before they lose their energy to thermalization.
“We’re intellectually excited about whether this will have technological applications,” says Pablo Jarillo-Herrero, associate professor of physics at MIT. “It’s too soon to know, but there are certain angles of looking at this where it's clear there might be ways to engineer energy flow or transfer in ways that are novel. Now we need more people thinking about this.”
The group’s results are published this week in the journal Nature Physics. Jarillo-Herrero’s co-authors include lead author and graduate student Qiong Ma, along with Jing Kong, professor of electrical engineering and computer science, and Nuh Gedik, associate professor of physics.
Page 1 of 3
Share on:
Subscribe
Stay ahead of the technologies shaping the future of electronics with our latest newsletter, Advanced Electronics Packaging Digest. Get expert insights on advanced packaging, materials, and system-level innovation, delivered straight to your inbox.
Subscribe now to stay informed, competitive, and connected.
Suggested Items
Designers Notebook: Implementing Strategic Planning Principles for PCB Design
09/03/2026 | Vern Solberg -- Column: Designer's NotebookDeveloping multiple-processor system-level products involves a broad range of engineering disciplines (commonly referred to as co-design), often led by a designated program manager who divides the development program into technical disciplines. The primary member of this team is the electrical engineer (EE), who prepares the overall schematic diagram of the product. This effort includes simulation and modeling, developing a BOM, and defining all active components and any specialized passive elements (often stipulating preferred or prequalified sources).
DFM Mistakes Designers Make When Moving to ELIC
07/20/2026 | Anaya Vardya, American Standard CircuitsThe transition from HDI to every layer interconnect (ELIC) is where the DFM gap between design intent and fabrication reality is most visible. Several common misconceptions appear consistently in the data packages we review at ASC. The most common ELIC design mistake mirrors what we generally see in first-time UHDI builds: using process minimums everywhere because they appear on a capability chart. In ELIC, this is especially consequential. If only one region truly requires aggressive geometry, say, a fine-pitch BGA escape, the rest of the design should preserve margin. Relaxing non-critical areas makes the overall build more manufacturable without sacrificing the dense region that drives the stackup.
Beyond Design: Skip-layer Routing—The Waveguide Structure That Makes 224G Possible
07/09/2026 | Barry Olney -- Column: Beyond DesignAs data rates climb from 112G PAM4 toward 224G PAM4 and beyond, electronics designers are discovering that traditional stripline and microstrip geometries are no longer sufficient. The physics simply break. Rise times are now in the single‑digit picosecond range, loss budgets are measured in millimeters, and even tiny discontinuities can collapse a PAM4 eye.
Every Layer Interconnect: The Promise, the Pain, and the Practical Limits
07/02/2026 | Anaya Vardya, American Standard CircuitsEvery layer interconnect (ELIC) is an architectural statement about how a PCB is built, signaling a fundamental shift in how we think about routing density, vertical interconnect, and the relationship between design and fabrication. To understand what ELIC solves, you have to understand what it replaces. Traditional HDI construction uses a rigid core with sequential build-up layers on one or both sides:configurations such as 2-4-2 or 3-2-3.
Base Material Properties and Microvia Reliability
07/01/2026 | Ed Kelley, Victory Giant TechnologyThe drive toward higher circuit density is challenging PCB manufacturers and their supply chains alike, with base materials as a critical foundation for complex designs. HDI designs present specific challenges and requirements for these materials, but given the myriad possible designs and applications, there is no optimal “one size fits all” material. Perhaps the most challenging HDI designs are those that use stacked vs. staggered microvias, with the number of layers of stacked microvias and the pitch between them as critical variables.