The Chemical Connection: Don’t Just Blame the Etcher
It’s Only Common Sense: Doing Business the Elon Musk Way
Nolan's Notes: ConvergenceGUC Delivers its First TSMC N3 Chip, AI-Optimized N5 Design Using Cadence Digital Solutions
January 20, 2023 | Cadence Design Systems, Inc.Estimated reading time: 1 minute
Cadence Design Systems, Inc. announced that Global Unichip Corp. (GUC) successfully delivered an advanced HPC design and a CPU design using Cadence® digital solutions. The HPC design was created using the Cadence Innovus™ Implementation System on TSMC’s advanced N3 process and featured a 3.5 million instance count that reached clock speeds of up to 3.16GHz. The CPU design was created using the AI-enabled Cadence Cerebrus™ Intelligent Chip Explorer and the digital full flow on the TSMC N5 process technology, delivering 8% reduced power and a 9% area improvement while significantly improving engineering productivity.
The Innovus Implementation System’s highly accurate GigaPlace engine provided GUC with support for TSMC FinFlex™ cell row placement and consideration for pin access throughout the flow for N3 design rule checking (DRC) closure. The state-of-the-art GigaOpt engine delivered improved optimization by enabling the most optimal configuration from the TSMC N3 library while balancing different cell row utilization. The Innovus Implementation System also includes a massively parallel architecture and incorporates the well-established NanoRoute engine, which enabled GUC to address signal integrity early in the design flow while improving post-route correlation.
Cadence Cerebrus, coupled with the Cadence digital flow, was instrumental in providing GUC with power, performance and area (PPA) benefits as well as the ability to perform synthesis through implementation and signoff on their 5nm CPU design, optimizing engineering team productivity. Unique to Cadence Cerebrus is its reinforcement learning engine that autonomously optimized GUC’s design flow, allowing the team to exceed human engineering potential and accelerate time to market.
“GUC is a market leader providing advanced chip solutions for AI, HPC, 5G, industrial and other emerging applications,” said Dr. Louis Lin, senior vice president of Design Services at GUC. “Given our commitment to deliver the most competitive designs to our customers, it is important for us to invest in leading-edge technologies. The Cadence Cerebrus Intelligent Chip Explorer, in conjunction with the broader digital flow, was the natural choice to help us achieve faster design turnaround via AI technology while also improving PPA. The Innovus Implementation System was instrumental in helping us deliver our first N3 chip, enabling our team to accelerate the creation of our high-performance, low-power HPC design.”
Share on:
Suggested Items
I-Connect007 Editor’s Choice: Five Must-Reads for the Week
09/22/2023 | Nolan Johnson, I-Connect007This week has been chock full of news about upcoming trade shows and conferences. Clearly, the season is upon us. This week, I-Connect007 reported on PCB West in Santa Clara (often referred to as the show which kicks off trade show season) and the topic of artificial intelligence was everywhere. By the looks of it, not just at the conference, either. For months now, the mainstream media has been gobbling up all sorts of news about generative AI engines, painting the picture that we’ll all lose our jobs to these tools, while also reporting on situations where the results from AI have gotten progressively worse over time.
Q2 Revenue for Top 10 Global IC Houses Surges by 12.5% as Q3 on Pace to Set New Record
09/21/2023 | TrendForceFueled by an AI-driven inventory stocking frenzy across the supply chain, TrendForce reveals that Q2 revenue for the top 10 global IC design powerhouses soared to US $38.1 billion, marking a 12.5% quarterly increase.
Cadence Advances Hyperscale SoC Design with Expanded IP Portfolio for TSMC N3E Process
09/21/2023 | Cadence Design Systems, Inc.Cadence Design Systems, Inc. announced it has expanded its design IP portfolio on TSMC’s 3nm (N3E) process—most notably with the addition of the flagship Cadence® 224G Long-Reach (224G-LR) SerDes PHY IP, which has achieved first-pass silicon success.
Connect the Dots: Best Practices for Prototyping
09/21/2023 | Matt Stevenson -- Column: Connect the DotsPCB prototyping is a critical juncture during an electronic device’s journey from concept to reality. Regardless of a project’s complexity, the process of transforming a design into a working board is often enlightening in terms of how a design can be improved before a PCB is ready for full production.
Cadence to Acquire Intrinsix Corporation from CEVA
09/20/2023 | Cadence Design Systems, Inc.Cadence Design Systems, Inc. and CEVA, Inc. announced that they have entered into a definitive agreement for Cadence to acquire Intrinsix Corporation, a wholly owned subsidiary of CEVA and a provider of design engineering solutions focused on the U.S. aerospace and defense industry.