The Knowledge Base: A Conference for Cleaning and Coating of Mission-critical Electronics
Defense Speak Interpreted: Is DARPA Still Around After CHIPS?
Beyond the Board: Orbital High Ground—Why Space Superiority Is Slipping Away
Latent Short Circuit Failure in High-Rel PCBs due to Cleanliness of PCB Processes and Base Materials
August 11, 2015 | Stan HeltzelEstimated reading time: 2 minutes
Latent short circuit failures have been observed during testing of PCBs for power distribution of spacecraft of the European Space Agency. Root cause analysis indicates that foreign fibers may have contaminated the PCB laminate. These fibers can provide a pathway for electromigration if they bridge the clearance between nets of different potential in the presence of humidity attracted by the hygroscopic laminate resin. PCB manufacturers report poor yield caused by contamination embedded in laminate. Inspections show that fiber contamination is present on prepreg and etched innerlayers. Further fiber contamination may be attracted in the manufacturing environment due to static charging. The requirements for cleanliness that are specified for final PCBs are orders of magnitude more stringent than
those specified for base materials. This paper describes inspections performed on base materials, manufacturing processes and final PCBs. It describes test methods that detect reduced insulation caused by contamination and electromigration. Moreover, a proposal is presented specifying tightened requirements for a new class of base materials for the manufacture of high-reliability PCBs.
I. Introduction
Latent short circuit failures have been observed in PCBs during testing of power distribution units of spacecraft for the European Space Agency (ESA). Root cause analysis has been conducted under review of non-conformance review boards (NRB). Printed circuit board assemblies failed after prolonged functional testing in ambient laboratory environment or after thermal vacuum cycles. Due to the large amount of damage caused by the electrical overstress, it was not possible to obtain direct evidence of the failure. However, a working hypothesis has been developed indicating that fiber contamination may have caused a latent short circuit. This hypothesis was further substantiated by reports on contamination issues in base materials and by a test method that demonstrated the breach of insulation due to fiber contamination.
At the time of the observed failures at equipment level, PCB manufacturers reported poor cleanliness levels of base laminate materials, causing poor yield. It is not possible to screen in an efficient manner for contamination in copper-clad laminate, since visual inspection requires stripping of the copper. Several inspection methods show the lack of cleanliness of base materials, which is specified in IPC4101[8]. This paper identifies a major gap between the requirements specified on base materials and the requirements on manufactured PCBs and presents a proposal for a new class of cleaner base materials for the manufacture of high-rel PCBs.
Editor's Note: This article originally appeared in the August 2015 issue of The PCB Magazine.
Share on:
Suggested Items
I-Connect007 Editor’s Choice: Five Must-Reads for the Week
07/11/2025 | Andy Shaughnessy, Design007 MagazineThis week, we have quite a variety of news items and articles for you. News continues to stream out of Washington, D.C., with tariffs rearing their controversial head again. Because these tariffs are targeted at overseas copper manufacturers, this news has a direct effect on our industry.I-Connect007 Editor’s Choice: Five Must-Reads for the Week
Digital Twin Concept in Copper Electroplating Process Performance
07/11/2025 | Aga Franczak, Robrecht Belis, Elsyca N.V.PCB manufacturing involves transforming a design into a physical board while meeting specific requirements. Understanding these design specifications is crucial, as they directly impact the PCB's fabrication process, performance, and yield rate. One key design specification is copper thieving—the addition of “dummy” pads across the surface that are plated along with the features designed on the outer layers. The purpose of the process is to provide a uniform distribution of copper across the outer layers to make the plating current density and plating in the holes more uniform.
Trump Copper Tariffs Spark Concern
07/10/2025 | I-Connect007 Editorial TeamPresident Donald Trump stated on July 8 that he plans to impose a 50% tariff on copper imports, sparking concern in a global industry whose output is critical to electric vehicles, military hardware, semiconductors, and a wide range of consumer goods. According to Yahoo Finance, copper futures climbed over 2% following tariff confirmation.
Happy’s Tech Talk #40: Factors in PTH Reliability—Hole Voids
07/09/2025 | Happy Holden -- Column: Happy’s Tech TalkWhen we consider via reliability, the major contributing factors are typically processing deviations. These can be subtle and not always visible. One particularly insightful column was by Mike Carano, “Causes of Plating Voids, Pre-electroless Copper,” where he outlined some of the possible causes of hole defects for both plated through-hole (PTH) and blind vias.
Trouble in Your Tank: Can You Drill the Perfect Hole?
07/07/2025 | Michael Carano -- Column: Trouble in Your TankIn the movie “Friday Night Lights,” the head football coach (played by Billy Bob Thornton) addresses his high school football team on a hot day in August in West Texas. He asks his players one question: “Can you be perfect?” That is an interesting question, in football and the printed circuit board fabrication world, where being perfect is somewhat elusive. When it comes to mechanical drilling and via formation, can you drill the perfect hole time after time?