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Automating Nondestructive Analysis of Underfill in Flip Chips
December 31, 1969 |Estimated reading time: 6 minutes
By Tom Adams, Sonoscan Inc.
Flip chip failure under operating conditions often stems from a root cause in the solder bumps or underfill materials supporting the bumps. Voids, delaminations, and cracks can lead to failures. Individual flip chip inspection can be difficult at production speeds without specialized software tools.
DefectsWhen a flip chip fails in service, the root cause of the failure often lies in the solder bumps or in the underfill material that supports the solder bumps. Various anomalies at this location can spawn long-term electrical failures. Voids air bubbles trapped in the cured underfill are probably the most frequent, although delaminations and cracks can lead to failures as well.
These anomalies are most easily inspected via acoustic micro imaging, and such imaging is a standard procedure during development. Anomalies are imaged, and their potential impact on reliability analyzed. The worst case typically is a void that is in contact with a solder bump, because this anomaly will almost certainly pass end-of-line electrical tests. Later, thermal stresses will permit the solder bump to creep slowly into the void until the bump has lost so much material that it collapses.
It makes sense for a technician to image individual flip chips manually during development and visually examine each void, delamination, or crack with the aim of tweaking production parameters to minimize these anomalies. However, in production, much greater speed is needed. Since both the number of solder bumps per chip and the volume of chips in a given production line are likely to be high, human inspection and analysis is impractical. Instead, an automated acoustic micro imaging system is used.
One software system was developed to use the data from automated acoustic micro imaging to measure and evaluate mechanical defects related to underfill depth in flip chips. The tool performs two operations. It identifies cells: an area of any shape whose corners are the centers of four solder bumps. The dotted square in Figure 1 is a cell. The software tool measures the percentage of area in each cell that has the acoustic properties of a void, delamination, or crack. A cell may be square, rectangular, a parallelogram, trapezoidal, or another quadrilateral.
The technology also examines each solder bump and counts the number of quadrants in the underfill surrounding the bump in which a void or other defect is in contact with the bump. The purpose is to identify those bumps that are likely to cause field failures. While a void in contact with a bump is likely to cause a rejection, a relatively small void that is not near a solder bump may be considered harmless in some applications, thus not a cause for rejection. Figure 1 shows voids ranging from accept to reject.
InspectionThe flip chip assemblies being inspected are carried in JEDEC-style trays and automatically conveyed through the acoustic micro imaging system. The scanning transducer sends a pulse of ultrasound into the target and a few microseconds later receives the return echoes. Because each return echo arrives back at the transducer only a few microseconds after it was launched, this operation is repeated thousands of times per second, and in turn produces thousands of pixels per second.
The bulk silicon overlying the underfill region is nearly transparent to ultrasound and, except in rare circumstances, has no internal features such as cracks. (The layers of metallization, however, may have acoustically visible defects.) Echoes from above and below the underfill region therefore are excluded typically, and the pulse is said to be gated on the underfill depth.
At the chip-to-underfill interface a portion of the pulse is reflected, and another portion travels deeper. Where the chip interfaces a solder bump, the same partial reflection occurs, but the degree of reflection (and the color of the bump in the acoustic image) will be different because underfill and solder have different acoustic characteristics. The strongest reflections are produced by gap-type features (voids, delaminations, cracks) that send virtually all of the ultrasound back to the transducer for collection.
These reflections are created by the great difference in acoustic properties between a solid material (silicon, mold compound) and the air or other gas that fills the defect. Almost none of the ultrasound crosses the defect, and there is no observable reflection from the interface between the bottom of the defect and the next solid material. The reflection of ultrasound from voids, delaminations, and cracks is virtually 100%, even if the vertical dimension of the anomaly is as small as 0.01 µm.
In the analysis of each cell bounded by four solder bumps, software looks for the relatively bright pixels created by high amplitude reflections from the interface between the underfill material (or the die face) and the gap-type defect. The actual brightness of the defects can vary from one type of flip chip to another, and even between two flip chips of the same type when, for example, the density of the underfill material has changed or the distribution of the filler particles has changed. An automatic threshold function is necessary to accommodate these differences and maintain consistent analysis.
When using automated acoustic micro imaging software, users define the accept/reject criteria, storing the analytical recipe that contains the criteria for each type of flip chip. Since the pattern of solder bump distribution, and therefore the size or shape of the cell, may vary from one region of the chip to another, recipes must store variations and analyze the acoustic data accordingly.Figure 2. Acoustic image of a large void. Cells, defined in color, change form with the change in bump distribution.
Figure 2 is the acoustic image of one corner of a flip chip whose peripheral solder bumps (top and left) are more densely arranged than those at the center of the chip. The large, complex white feature is a void that surrounds or is in contact with several of the more widely spaced solder bumps in the center of the chip and that also extends upward and to the left into the more tightly arranged peripheral bumps. In terms of acoustic analysis, this large void would occupy many individual cells. The outlines of some of the individual cells are shown in color. Each of the two regions uses a distinctive cell pattern for analysis.
Figure 3 shows one corner of a flip chip having a single, somewhat elongate void (the diagonal white area). At left is the acoustic image, showing the actual extent of the void. At right, the whole area of each of the cells affected by the void is shown in white. Note the different bump array pattern at the top of the chip.
In the analysis of individual cells, recipes for many flip chips should permit an upper limit of 20% to 25% of defect-related pixels per cell, although in some applications the limit may be as high as 50%, depending on reliability requirements, previous experience with the device, and other factors. Upper limits for the number of quadrants in which a solder bump is in contact with a void likewise depend on reliability needs and previous history.
ConclusionThe overall purpose of automatic acoustic micro imaging software is to perform an analysis that conforms as closely as possible to the future reliability profile of the flip chip, and to perform this analysis far more rapidly than could be done manually. Because this tool is nondestructive, it leaves the flip chip available for other types of testing and analysis. It gives engineers a new method for minimizing field failures and maximizing long-term reliability.
Tom Adams is a consultant to Sonoscan. Read his other articles for SMT, including STEP 6: Component Placement and Acoustic Imaging of Embedded ICs. For more information, visit www.sonoscan.com.