The Impact of Via and Pad Design on QFN Assembly

Estimated reading time: 3 minutes

ABSTRACT

Quad flat no-lead (QFN) packages have become very popular in the industry and are widely used in many products. These packages have different size and pin counts, but they have a common feature: a thermal pad at the bottom of the device. The thermal pad of the leadless QFN provides efficient heat dissipation from the component to PCB. In many cases, a thermal via array under the component is used to conduct heat away from the device. However, thermal vias can create more voids or result in solder protrusion onto the secondary side.

This paper discusses our study on the impact of via size and via design on QFN voiding and solder protrusion. Does a small via prevent the solder to flow to the other side? How should the via be designed? Which via type will have less of a voiding issue? A comprehensive experiment was designed to try to answer these questions. Different QFN types, via design, via sizes, via pitches and stencil design were studied using three different board thicknesses: 1.6 mm, 2.4 mm and 3.2 mm.

Introduction

Quad flat no-lead package is designed so that the thermal pad is exposed on the bottom of the component. This creates a low thermal resistance path between the die and the exterior of the package and provides excellent heat dissipation from the component to PCB. Thermal vias in the PCB thermal pad are typically used to conduct the heat away from the device and to transfer effectively the heat from the top copper layer of the PCB to the inner or bottom copper layer or to the outside environment. A cross-section view of QFN and PCB thermal vias is shown in Figure 1.

Figure 1: Cross-section of QFN and PCB structure.

There are several publications about the PCB layout guidelines for QFN packages requiring thermal vias^[1-2]. Some recommend thermal vias in the solder mask defined thermal pad^[2] while others place the thermal vias directly on the thermal pad without any solder mask^[1]. The solder mask around the via can keep the solder away from the via and prevent it from flowing into the via. However, the solder mask ring tends to create more voids or unsoldered areas at the thermal pad. On the other hand, the solder can flow into the thermal vias if there is no solder mask ring and result in solder loss and solder protrusion onto the secondary side, which can interfere with the assembly process and become a quality issue. In this paper, we will discuss the impact of via design, board design and process parameters on solder protrusion at the thermal pad’s vias. QFN voiding is a known industry challenge with many publications^[3–6]. The influence of via design and processes on voiding will also be presented in the paper.

Experimental Details

Test Vehicle and Components

A QFN test vehicle was designed for this study. The test vehicle had the dimension of 177 x 177 mm. The board surface finish was immersion silver (I-Ag). Three different board thicknesses of 1.6 mm (62 mil), 2.4 mm (93 mil) and 3.2 mm (125 mil) were investigated. The image of the test vehicle is shown in Figure 2.

Figure 2: Flex QFN test vehicle Rev 2.

Six different QFN packages with different pin counts and component body size were included in the test vehicle. Both single row and dual row QFN components were studied. The QFN pitch varied from 0.4 mm, 0.5 mm to 0.65 mm. The QFN component body size ranged from 3 x 3 mm to 12 x 12 mm.

Design Variables

Many via variables were designed into the test vehicle, including via size, via pitch and via design. Five different via sizes were investigated. They were 0.20 mm (8 mil), 0.22 mm (9 mil), 0.25 mm (10 mil), 0.30 mm (12 mil), and 0.51 mm (20 mil). Via spacing was 0.5 mm, 1 mm and 1.27 mm. Most through hole vias with no solder mask ring were used while some vias were designed with the solder mask around the via.

Process Variables

Besides the component, board thickness and via design variables, the study also included two different stencil designs. Window pane aperture opening and 1:1 pad aperture opening stencils were used. For the window pane design, the solder paste was printed away from the vias except at the 0.5 mm via pitch locations. For the 1:1 pad design, the paste was printed over the vias. In addition, the boards were reflowed using air and nitrogen, and were reflowed using two different reflow ovens.

To read this entire article, which appeared in the November 2016 issue of SMT Magazine, click here.