Global Citizenship: What I’ve Learned About the American PCB Business
Global Sourcing Spotlight: The Best Products to Buy Offshore Through Global Sourcing
Nolan's Notes: The Rise (and Risk) of Data
IPC Designers Council Orange Co. Chapter Holding Lunch ‘n’ Learn April 19
April 5, 2017 | Scott McCurdy, Freedom CAD ServicesEstimated reading time: 2 minutes
The Orange County Chapter of the IPC Designers Council is holding a Lunch ‘n’ Learn event on April 19 at JT Schmid’s Restaurant & Brewery in Anaheim. This meeting features two speakers and takes place from 11:30 am - 1:30 pm in the Regan Room at JT Schmid's.
The first speaker is Cuong Nguyen, Field Applications Engineering Manager with EDA Direct. His presentation is titled "High-Speed DDR4 Memory Design and Power Integrity Analysis: What designers need to know to achieve the best performance with DDR4."
DDR4 is an entirely new memory architecture with higher bandwidth, lower power consumption, and higher memory capacity. Incorporating DDR4 memory interfaces in today’s design poses many challenges for both the EE’s as well as the layout engineers. These high-speed interfaces require careful considerations in terms of optimizing the electrical signaling between sensitive components and to minimize the noise from high switching activities from the memory devices. Layout constraints must be carefully specified to ensure tight timing alignment for clock and strobe signals. In addition, the power distribution network (PDN) also became more fractured to support the many supplies required by current ASIC and FPGA devices. This, an insufficient decoupling for the supplies, can potentially create more noise, crosstalk, and increase the EMI in the system.
In this seminar, we will review the DDR4 architecture, routing topologies, signaling protocols, how it can be simulated on the PCB, and how to maximize PDN designs from a layout perspective. Based on the simulation results, optimizing trace routing, board stackup, component placements, connectors, terminations, and other tradeoffs can be implemented to maximize the performance of your design.
The second speaker is Ammar Abusham, Senior Applications Engineer with Mentor Graphics, presenting "Better PCB Design Using the Fabricator’s View: What designers need to know about DFM verification and its impact on your design." You are an experienced PCB designer using a good CAD flow. So why is it that what appears to be a good design to you and your layout tool always seems to raise a bunch of questions with your fabricator?
Well, the fabricator sees things differently than you. If you’re like most designers, you are very focused on designing a PCB to the electrical and form-factor specifications. And of course, you take pride in how clean your design looks. Your fabricator on the other hand, is mostly paying attention to those aspects of your design which affect yield, costs, and delivery. To avoid any unpleasant surprises in these areas, it might make sense to put yourself in your fabricator’s shoes for a moment and see some of the checking they will perform on your design data prior to committing it to fabrication. To do this, we’re going to step through a typical PCB fabrication process and identify where DFM issues are likely to show up and what the fabricator is looking for.
Reserve a spot on your calendar on Wednesday, April 19 from 11:30 am to 1:30 pm for this educational “Lunch ‘n Learn” meeting event.
Location
JT Schmid’s Restaurant & Brewery (in Regan’s Room)
2610 E. Katella Ave.
Anaheim, CA 92806
Google MAP to our meeting in Anaheim
Cost: $15 at the door to help cover the lunch cost. Please RSVP no later than noon on Tuesday, April 18.
To RSVP:
We look forward to seeing you!
Scott McCurdy, President, IPC Designers Council - Orange County chapter
Freedom CAD Services
cellphone: 714-425-3235
scott.mccurdy@freedomcad.com
www.ocipcdc.org
Share on:
Suggested Items
Rules of Thumb for PCB Layout
11/21/2024 | Andy Shaughnessy, I-Connect007The dictionary defines a “rule of thumb” as “a broadly accurate guide or principle, based on experience or practice rather than theory.” Rules of thumb are often the foundation of a PCB designer’s thought process when tackling a layout. Ultimately, a product spec or design guideline will provide the detailed design guidance, but rules of thumb can help to provide the general guidance that will help to streamline the layout process and avoid design or manufacturing issues.
PCB Design Software Market Expected to Hit $9.2B by 2031
11/21/2024 | openPRThis report provides an overview of the PCB design software market, detailing key market drivers, challenges, technological advancements, regional dynamics, and future trends. With a projected compound annual growth rate (CAGR) of 13.4% from 2024 to 2031, the market is expected to grow from USD 3.9 billion in 2024 to USD 9.2 billion by 2031.
KYZEN to Spotlight KYZEN E5631, AQUANOX A4618 and Process Control at SMTA Silicon Valley Expo and Tech Forum
11/21/2024 | KYZEN'KYZEN, the global leader in innovative environmentally friendly cleaning chemistries, will exhibit at the SMTA Silicon Valley Expo & Tech Forum on Thursday, December 5, 2024 at the Fremont Marriott Silicon Valley in Fremont, CA.
Flexible Thinking: Rules of Thumb: A Word to the Wise
11/20/2024 | Joe Fjelstad -- Column: Flexible ThinkingIn the early days of electronics manufacturing—especially with PCBs—there were no rules. Engineers, scientists, and technicians largely felt their way around in the dark, making things up as they went along. There was a great deal of innovation, guessing, and testing to make sure that early guidelines and estimates were correct by testing them. Still, they frequently made mistakes.
Cadence Unveils Arm-Based System Chiplet
11/20/2024 | Cadence Design SystemsCadence has announced a groundbreaking achievement with the development and successful tapeout of its first Arm-based system chiplet. This innovation marks a pivotal advancement in chiplet technology, showcasing Cadence's commitment to driving industry-leading solutions through its chiplet architecture and framework.