Global Citizenship: What I’ve Learned About the American PCB Business
Global Sourcing Spotlight: The Best Products to Buy Offshore Through Global Sourcing
Nolan's Notes: The Rise (and Risk) of Data
International Wafer-Level Packaging Conference (IWLPC) Workshops
August 29, 2017 | IWLPCEstimated reading time: 1 minute
The SMTA and Chip Scale Review are pleased to announce the Workshops for the 14th Annual International Wafer-Level Packaging Conference (IWLPC) held October 26th. IWLPC will be held October 24-26, 2017 at the DoubleTree Airport Hotel in San Jose, California.
Two workshops are scheduled for the morning of October 26th. John Hunt, ASE (US) Inc., will instruct “Fan-Out Packaging – Technology Overview and Evolution,” providing an overview of the drivers, technology, advantages and disadvantages of various structural and processing options, as well as a view of potential future trends for Fan-Out Packaging.
Concurrently, Fernando Roa, Ph.D., Amkor Technology, will lead the course “Package on Package, Design, Process and Quality,” delving into critical design rules to observe during the layout of the substrates required for such packaging as well as best known methods for assembly including rules of thumb for selection of materials, typical process flows, and quality metrics.
Two workshops are also slated for the afternoon. John Lau, Ph.D., ASM Pacific Technology, will discuss recent advances in fan-out wafer/panel level packaging, 3D IC packaging, 3D IC integration, 2.5D IC Integration, embedded 3D hybrid integration, 3D CIS/IC integration, 3D MEMS/IC integration, and Cu-Cu hybrid bonding in his workshop “Fan-Out Wafer-Level Packaging and 3D Packaging.”
That same afternoon, Rao R. Tummala, Ph.D., Georgia Institute of Technology, will instruct “Future of Packaging: Embedded and Non-embedded and Fan-Out.” The course will review the current approach to devices, device packaging and system packaging including traditional single- and multi-chip packaging as well as the recent focus in embedded and fan-out packaging.
For more information, click here.
Share on:
Suggested Items
Designing for Cost to Manufacture
11/21/2024 | Marcy LaRont, I-Connect007ICAPE's Richard Koensgen, a seasoned field application engineer with a rich background in PCB technology, shares his journey of working with customers and manufacturers through the intricacies of circuit board development and emphasizes the importance of early-stage collaboration with PCB designers. With a focus on tackling the most challenging aspects of PCB design and manufacturing, he discusses everything from layout considerations to the thermal challenges of today's technology when it comes to designing for cost.
OSI Systems Receives $11M Order for Electronic Assemblies
11/21/2024 | BUSINESS WIREOSI Systems, Inc announced that its Optoelectronics and Manufacturing division has received an order for approximately $11 million to provide critical electronic sub-assemblies for a leading-edge healthcare original equipment manufacturer (OEM), known for innovative and specialized medical solutions.
CHIPS for America Announces Up to $300M in Funding to Boost U.S. Semiconductor Packaging
11/21/2024 | U.S. Chamber of CommerceThe Biden-Harris Administration announced that the U.S. Department of Commerce (DOC) is entering negotiations to invest up to $300 million in advanced packaging research projects in Georgia, California, and Arizona to accelerate the development of cutting-edge technologies essential to the semiconductor industry.
NTT, Olympus Joint Demonstration Shows IOWN APN's Low-latency Capability
11/21/2024 | JCN NewswireNTT Corporation and Olympus Corporation announced that, following the start of their joint experiment in March of the world’s first cloud endoscope system which processes endoscopic videos on the cloud, they jointly established a cloud endoscopy system utilizing the IOWN APN technology.
Hon Hai Joins OpenUSD Alliance to Promote Standardized and Open Source Universal Scenario Description (USD) Technology
11/21/2024 | Hon Hai Technology GroupHon Hai Technology Group , the world’s largest technology manufacturing and service provider, announced that it has joined the Alliance for OpenUSD (AOUSD ) to support the construction of a 3D ecosystem and promote Cooperation among various industries around the world promotes the standardization of Universal Scene Description (USD ).