It’s Only Common Sense: Selling to Today's Generation of Buyers
Dan’s Biz Bookshelf: ‘Believe in Better'
The Big Picture: Our Big ‘Why’ in the Age of AI
57th DAC Designer and IP Track Submission Site Open
December 19, 2019 | Business WireEstimated reading time: 3 minutes
The Design Automation Conference (DAC) is now accepting submissions for the 57th DAC Designer and IP Track. This is an opportunity for engineers and developers around the world to help shape the future by sharing their technical insights at the premier event devoted to the design and design automation of electronic chips to systems.
The 57th DAC will be held at Moscone West Center in San Francisco from July 19-23, 2020. DAC will co-locate with SemiCon West 2020, which is being held at the Moscone Center, North and South Halls, July 21-23, 2020. The Designer and IP Tracks bring together designers, users and experts from across the globe to present their design experiences on effective design flows, methods, and tool usage. Each track offers a unique opportunity to network with and learn from other industry experts.
“The focus of the Designer Track is on the flows and methodologies deployed for ASIC design, verification, implementation and software integration by the user,” said Designer and IP Track Chair, Renu Mehra of Synopsys. “This track covers core EDA front-end and back-end topics and also focuses on verticals including autonomous systems, machine learning, security and cloud. The Designer Track is the only one of its kind, developed exclusively by DAC to provide EDA tool users, hardware designers, software engineers, and application engineers the opportunity to share knowledge and experiences with each other.”
“The IP Track at DAC has grown significantly over the past five years since inception,” said IP Track Co-Chair, Randy Fish of UltraSoC. “The key to the growth is it not only brings together the entire IP, electronic design ecosystem under one roof for three days but the track is targeted specifically at practitioners. So, whether you are an IC designer, IP core designer, IP ecosystem provider, embedded software developer, automotive electronics engineer, security expert or engineering manager, the IP Track is the place to meet and share your experiences.”
The submission process for both tracks is easy: Submit a 100-word description of your presentation with six slides. Submissions may describe the application of tools to the design of a novel electronic system or the integration of EDA tools within a design flow or methodology to produce such systems. The Designer Track and IP Track differ from vendor-specific user forums in that they are not tied to a specific EDA vendor.
Designer Track Submissions: www.dac.com/submission-categories/designer-track
The DAC Designer Track committee is looking for submissions that tackle relevant topics and provide high-quality content which target challenges, innovations and trends in chip design. Categories include:
- Front-end silicon design
- Back-end silicon design
- Automotive
- Security
- Machine learning
- Cloud applications
- IoT
IP Track Submissions: https://www.dac.com/submission-categories/ip-track
IP Track submissions may describe the overall design and/or application of tools for creating the hardware, IP and/or software components of a novel electronic system. The IP Track committee is specifically seeking contributions from:
- System engineers
- Hardware designers
- Embedded software developers
- Application engineers
- Vendor/customer teams
Documented tool use may target electronic design and system design at all levels of abstraction and across all application domains.
Presentation and Poster Format
Based on Program Committee evaluation, Designer Track and IP Track submissions may be accepted in either presentation and poster form or poster-only form. A Best Presentation award, based on both the quality of the submission and the DAC presentation itself, will be selected from each of the Front-end and Back-end Designer Tracks and IP Track presentations.
Accepted Designer Track and IP Track presentations and posters are not included in the DAC proceedings. However, accepted Designer Track and IP Track submissions (both posters and presentation slides) will be made available on the DAC website after the conference as a part of the DAC Archives.
The deadline for all Designer and IP Track submissions is January 22, 2020. For additional submission information and deadlines, please visit www.dac.com under Call for Contributions or https://www.dac.com/submission-categories/designer-track#questions.
Share on:
Suggested Items
DownStream Acquisition Fits Siemens’ ‘Left-Shift’ Model
06/26/2025 | Andy Shaughnessy, I-Connect007I recently spoke to DownStream Technologies founder Joe Clark about the company’s acquisition by Siemens. We were later joined by A.J. Incorvaia, Siemens’ senior VP of electronic board systems. Joe discussed how he, Rick Almeida, and Ken Tepper launched the company in the months after 9/11 and how the acquisition came about. A.J. provides some background on the acquisition and explains why the companies’ tools are complementary.
Elementary Mr. Watson: Retro Routers vs. Modern Boards—The Silent Struggle on Your Screen
06/26/2025 | John Watson -- Column: Elementary, Mr. WatsonThere's a story about a young woman preparing a holiday ham. Before putting it in the pan, she cuts off the ends. When asked why, she shrugs and says, "That's how my mom always did it." She asks her mother, who gives the same answer. Eventually, the question reaches Grandma, who laughs and says, "Oh, I only cut the ends off because my pan was too small." This story is a powerful analogy for how many PCB designers approach routing today.
Siemens Turbocharges Semiconductor and PCB Design Portfolio with Generative and Agentic AI
06/24/2025 | SiemensAt the 2025 Design Automation Conference, Siemens Digital Industries Software today unveiled its AI-enhanced toolset for the EDA design flow.
Cadence AI Autorouter May Transform the Landscape
06/19/2025 | Andy Shaughnessy, Design007 MagazinePatrick Davis, product management director with Cadence Design Systems, discusses advancements in autorouting technology, including AI. He emphasizes a holistic approach that enhances placement and power distribution before routing. He points out that younger engineers seem more likely to embrace autorouting, while the veteran designers are still wary of giving up too much control. Will AI help autorouters finally gain industry-wide acceptance?
Beyond Design: The Metamorphosis of the PCB Router
06/18/2025 | Barry Olney -- Column: Beyond DesignThe traditional PCB design process is often time-consuming and labor-intensive. Routing a complex PCB layout can consume up to 30% of a designer’s time, and addressing this issue is not straightforward. We have all encountered this scenario: You spend hours setting the constraints and finally hit the Go button, only to be surprised by the lack of visual appeal and the obvious flaws in the result.