2020 EIPC Winter Conference, Day 1

Estimated reading time: 21 minutes

The afternoon session began with a roundtable on roadmapping and standardisation, moderated by Tarja Rapala-Virtanen, with short presentations from Steve Payne, Alun Morgan, and Emma Hudson followed by a panel discussion.

Steve Payne, manager of European operations for iNEMI, introduced the organisation as an industry-led research and development consortium that roadmapped the future technology requirements of the global electronics industry. He explained that the iNEMI roadmap had become recognised as an important tool for defining the state-of-the-art in the electronics industry as well as identifying emerging and disruptive technologies. There were 500 participants globally. The organic PCB chapter drew on information from product emulator chapters, which defined the future needs for high-end systems, aerospace, automotive, office and computer, and portable and wireless. It had identified development needs in HDI technology, microvia plating, modelling tools for embedded active and passive components, improved layer registration, fine-line imaging, alternatives to back-drilling, cycle time reduction for rigid and flexible circuits, and Industry 4.0 adoption. Key drivers were miniaturisation with increased functionality, increasing data volumes and transfer speeds, higher-speed processors, increasing complexity of components, form and flexibility of interconnects, and environmental considerations.

Payne also listed current collaborative projects aimed at eliminating gaps in the technology evolution to satisfy product sector needs, commenting that, 10 years hence, 5G would probably have been superseded by 6G and that artificial intelligence might be the next boundary to cross.

Alun Morgan, technology ambassador for Ventec International Group, suggested revising the ANSI grade definitions for thermosetting laminates as used by UL, IEC, and IPC. The current grading system was based on the NEMA LI 1 Standard, first published in 1965, which classified materials based on their chemistry.

Morgan commented that, in the modern world of electronics, the performance of the PCB and the printed circuit assembly was all that mattered, that much of the performance was contributed by the base material, and that the designer only cared about the performance. The varnish building block definitions used in the current UL 746E standard requested that they are listed by chemistry. In fact, the building blocks were not defined as allowable chemistries, and some building blocks fell into multiple categories, which led to confusion. And the building blocks were not defined as to the minimum and maximum loadings.

The way forward, Morgan proposed, was to define base materials less on what they were made of but more on their performance. As an example, he gave IPC-4103, which characterised materials only on their Dk and Df performance at certain frequencies without concern for the chemical composition. Morgan recommended that once UL listed as to their safety characteristics, the base materials be put in common categories where the printed board shop must test one material out of the same group for PCB approval. And if the base material qualified as FR-4.1, it no longer mattered that a secondary resin was present from the board point of view.

Emma Hudson, technical consultant and expert on electronics industry standards and certification, summarised the current and recent standards development work of IEC TC 91, and the upcoming proposals from UL—particularly those related to solder limits, which were recognised parameters for PCBs, solder resists and metal-clad laminates. Solder limits were meant to represent the soldering processes the PCB would be exposed to during component assembly operations. UL was looking to change the term to “assembly soldering process” to provide a better description of what was meant by the parameter. The proposed default condition would be six cycles of IPC-TM-2.6.27 T260 reflow, and the reflow profile would be considered representative of wave and selective soldering. Follow-up service inspectors would check the maximum reflow temperature and the number of soldering cycles that the printed circuit assembly was exposed to, but would not be checking any other details of the reflow profile.

There was no plan to apply the new assembly soldering process limits to existing board types, but only to new evaluations, once the proposal had been accepted by the UL Standards Technical Panel and added to UL 796, UL 746E, UL 796F, and UL 746F. Hudson stressed that there was no guarantee at this stage that the proposal would be accepted. Not surprisingly, it was Emma Hudson’s topic that attracted the majority of questions from the audience.

The session on reliability and environmental technology was moderated by EIPC board member John Fix, director of marketing and sales with Taiyo America. His first presenter was Martin Cotton, project facilitator with the HDP User Group, discussing the final report of the project evaluating the effect of moisture conditioning on several high-frequency Dk and Df test methods using a variety of laminate materials. Earlier work had found that differences in moisture conditioning contributed up to a 43% difference in measured Df values, for the same laminate material, depending upon the test method used.

The objective of the final phase of the project had been to evaluate the effect of varying moisture conditioning on Df and Dk measurements for a series of different low-Df, mid-Df and high-Df laminate materials—half of which were halogen-free—to determine the sensitivity of each test method to different moisture levels and what test frequency range or ranges were most affected by the moisture present within a laminate material.

The results were presented as an extensive series of scatter plots and graphs, which demonstrated that the test method coupon design had a significant impact on the measured results. Trace-Conductor coupons with plane layers on both sides showed no detectable difference in Dk and Df that might be correlated with moisture conditioning. The moisture conditioning methodology used for the Z-axis and in-plane test methods was sufficient to show a significant impact on loss due to moisture conditioning. The effect of moisture conditioning on the Dk and Df of laminate materials was shown to vary depending upon the specific laminate material being tested, and the HDP User Group recommended that users of these high-frequency test methods include in their test runs a base-line laminate material as a control. The test results showed that the Dk and Df values for the as-received and dry baked samples with internal plane layers were not always very close, mainly because of uncertainties in measuring the exact moisture content in such samples.Page 3 of 5

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