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Defense Speak Interpreted: DMEA

With all the publicity about new semiconductor initiatives at the U.S. Department of Defense, I had lost sight of the fact that the DoD needs secure semiconductors for existing programs and to keep fielded weapons operating right now. How does the DoD get those secure electronics (and how have they gotten them for the past 20 years)? A June 17 article announced a supply chain award of $10.7 billion to eight defense companies for semiconductors ^[1]. And who administers this contract and keeps the technology secure? The answer is the Defense Microelectronics Agency (DMEA). This award is a near doubling of the 2016 procurement contract previously in place.

The Advanced Technology Support Program (ASTP) at DMEA could possibly spend as much as $17.5 billion by the end of this contract in 2026. The DoD has the task of maintaining weapons systems for 30–40 years or more and needs access to totally obsolete parts to do so. Many of these have to be uniquely manufactured for systems sustainment. The ASTP is for the “unreliable, unmaintainable, underperforming, or incapable electronics hardware and software.” You may say, “Re-engineer it or reprogram it,” when you hear this expense. That is much easier said than done for systems that must be re-qualified after any change in design.

The key to the DMEA mission is trusted access. This means that the DoD can obtain any required chip to keep its weapons systems operational. At the leading edge, DMEA has arrangements with state-of-the-art wafer fabrication locations that are qualified as secure. The whole supply chain for chips is audited and certified by the DMEA: broker, design, aggregation, mask data parsing, mask manufacturing, foundry services, post-processing, assembly and packaging, and testing.

Also, various fabs are qualified to silicon, gallium arsenide, silicon carbide, and indium phosphide. However, not all these are capable of state-of-the-art dimension resolutions, currently down to 32 nanometers in silicon and 90 nanometers in silicon germanium (more about dimensions in the description of the IBM/Global Foundries transactions later). The DMEA has its own small wafer fabrication operation at the McClellan, California, site (Sacramento). Fortunately, older chips used larger dimensions that the secure fabs can produce.

Having a secure source of ICs within the DoD dates to around 1990, when the National Security Administration established a wafer fabrication facility at Fort Meade, Maryland. Moore’s law dictated that a wafer fab needs to upgrade its capability every few years or fall behind in technology. This became increasingly expensive for the DoD, was abandoned, and that fab shut down. The DMEA was chartered in 1997, and its own small wafer fabrication facility in California was implemented in 2003.

Security administration at DMEA comes through the Trusted Access Program Office (TAPO). Continuing to now, the TAPO security program supervises the full fabrication sequence listed above. Today, 78 facilities are certified as trusted by the TAPO office for the various aspects of chip manufacture. The actual certification process is as presented in Figure 1.

Figure 1: Trusted supplier accreditation process. (Source: DMEA ^[2])

While DMEA audits the procedures for becoming trusted, the Defense Security Service (DSS) does the physical examination of the facility and its security. Actually, the chart needs to be updated to say DCSA; as in July of 2019, the security clearance of individuals was added to DSS, and the name broadened to Defense Counterintelligence and Security Agency. But who are these DCSA people? A kissing cousin agency is the Navy Criminal Investigative Service—the NCIS of television fame. As if the 78 TAPO facilities were not enough, DCSA supervises the security of approximately 13,000 “cleared” facilities of subcontractors to the DoD and other federal agencies.

While the DMEA pretty well has a handle on the DoD chip needs for today, the crystal ball for the future is becoming much more clouded. The DoD and DMEA invested heavily in the IBM wafer fabrication facility in East Fishkill, New York, starting in 2003. However, IBM paid Global Foundries (ultimately owned in Abu Dhabi) to take over their chip production facilities in October of 2014. This included provisions for the secure production of DoD chips in “Fab 10” in East Fishkill. But Global Foundries has recently given up on developing the very smallest IC geometries (the nodes designated 10 nanometers and 7 nanometers just now). Global Foundries currently cannot manufacture below 14 nanometers at Fab 10 ^[3]. And, Global Foundries is in the process of transferring East Fishkill ownership to ON Semiconductor.

Taiwan Semiconductor Manufacturing Corporation (TMSC) and Samsung of Korea have initiated production for 7-nanometer geometries in the last two years. However, today, neither manufactures to this resolution in the USA. Recently, to add to the drama, TMSC announced that they would build a wafer fab in Arizona. Could that be a future high-resolution fab for the DMEA and DoD?

Conversely, could all the announced projects—MINSEC from Defense Research and Engineering, CHIPS being sponsored by Navy Crane, or the new CHIPS appropriation proposed by Congress ($50 billion)—all be part of the solution for DoD state-of-the-art IC chip security? We will have to see how the DMEA integrates into the operation of these new facilities once they are completed.

References

1. G. Leopold, “DoD Microelectronics Office Boosts Contract Ceiling,” EE Times, June 17, 2020.
2. DMEA, “DMEA Trusted IC Program: Trusted Supplier Accreditation Process Chart.”
3. M. Lapedus, “A Crisis in DoD’s Trusted Foundry Program?” Semiconductor Engineering, October 22, 2018.

Dennis Fritz was a 20-year direct employee of MacDermid Inc. and has just retired after 12 years as a senior engineer at (SAIC) supporting the Naval Surface Warfare Center in Crane, Indiana. He was elected to the IPC Hall of Fame in 2012.